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authorIru Cai <mytbk920423@gmail.com>2018-12-21 16:42:03 +0800
committerIru Cai <mytbk920423@gmail.com>2019-11-17 15:10:43 +0800
commita805662a444a5e83ede937047d7d2461f9b4507b (patch)
tree82a82ecbc88f0c7a74fc0b3fe7801e3b7d9b40a4
parentd4803a02e315f7fe465295f619d2df21ce82196f (diff)
downloadcoreboot-a805662a444a5e83ede937047d7d2461f9b4507b.tar.xz
try to put some non-function code to C
-rw-r--r--src/northbridge/intel/haswell/Makefile.inc1
-rw-r--r--src/northbridge/intel/haswell/do_raminit_frag.c31
-rw-r--r--src/northbridge/intel/haswell/mrc.asm47
3 files changed, 39 insertions, 40 deletions
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index 64a1112cda..39e89970a1 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -52,6 +52,7 @@ romstage-y += mrc_main.c
romstage-y += mrc_pch_init.c
romstage-y += mrc_misc.c
romstage-y += pei_mem.c
+romstage-y += do_raminit_frag.c
postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/haswell/do_raminit_frag.c b/src/northbridge/intel/haswell/do_raminit_frag.c
new file mode 100644
index 0000000000..cffd68787b
--- /dev/null
+++ b/src/northbridge/intel/haswell/do_raminit_frag.c
@@ -0,0 +1,31 @@
+#include <southbridge/intel/lynxpoint/pch.h>
+#include <arch/io.h>
+
+// loc_fffa3c2e
+//
+void io_fffa3c2e(void);
+void io_fffa3c2e(void)
+{
+ u32 reg3410;
+ u8 t1, t2, tmp;
+
+ RCBA32_OR(0x3410, 0x10);
+ reg3410 = RCBA32(0x3410);
+ t1 = inb(0x70) & 0x80;
+ t2 = t1 | 0xa;
+ RCBA32_AND_OR(0x3410, 0xffffffef, 0);
+ reg3410 = RCBA32(0x3410);
+ outb(t2, 0x70);
+ tmp = (inb(0x71) & 0x8f) | 0x60;
+ outb(tmp, 0x71);
+ t1 |= 0xb;
+ outb(t1, 0x70);
+ tmp = inb(0x71) | 0x80;
+ outb(tmp, 0x71);
+ outb(t2, 0x70);
+ tmp = (inb(0x71) & 0x8f) | 0x20;
+ outb(tmp, 0x71);
+ outb(t1, 0x70);
+ tmp = inb(0x71) & 0x7f;
+ outb(tmp, 0x71);
+}
diff --git a/src/northbridge/intel/haswell/mrc.asm b/src/northbridge/intel/haswell/mrc.asm
index deeb2a4016..722f38157c 100644
--- a/src/northbridge/intel/haswell/mrc.asm
+++ b/src/northbridge/intel/haswell/mrc.asm
@@ -133,6 +133,8 @@ extern ref_fffcd554
extern ref_fffcd560
global wstr_pchinitpei
+;; raminit_frag
+extern io_fffa3c2e
mrc_entry:
mov ecx, esp
@@ -3060,8 +3062,11 @@ add esp, 0x10
and eax, 0xfc000000
mov ax, word [eax + 0xf80a4] ; pci_read_config16(PCH_LPC_DEV, GEN_PMCON_3);
test al, 4
-je loc_fffa3c99 ; je 0xfffa3c99
-jmp near loc_fffa3c2e ; jmp 0xfffa3c2e
+je loc_fffa3c99
+mov esi, edx ; save edx
+call io_fffa3c2e
+mov edx, esi
+jmp loc_fffa3c99
loc_fffa3b14:
cmp dx, 0x8c4f
@@ -3195,44 +3200,6 @@ cmp ebx, eax
jl short loc_fffa3bc0 ; jl 0xfffa3bc0
jmp near loc_fffa3ab5 ; jmp 0xfffa3ab5
-loc_fffa3c2e:
-mov eax, dword [edx + 0x3410]
-or eax, 0x10
-mov dword [edx + 0x3410], eax
-mov eax, dword [edx + 0x3410]
-in al, 0x70
-mov esi, eax
-mov eax, dword [edx + 0x3410]
-and eax, 0xffffffef
-and esi, 0xffffff80
-mov dword [edx + 0x3410], eax
-mov ecx, esi
-mov eax, dword [edx + 0x3410]
-or ecx, 0xa
-mov al, cl
-out 0x70, al
-in al, 0x71
-and eax, 0xffffff8f
-or eax, 0x60
-out 0x71, al
-or esi, 0xb
-mov eax, esi
-out 0x70, al
-in al, 0x71
-or eax, 0xffffff80
-out 0x71, al
-mov al, cl
-out 0x70, al
-in al, 0x71
-and eax, 0xffffff8f
-or eax, 0x20
-out 0x71, al
-mov eax, esi
-out 0x70, al
-in al, 0x71
-and eax, 0x7f
-out 0x71, al
-
loc_fffa3c99:
mov dword [edx + 0x3310], 0x10 ; RCBA32(0x3310) = 0x10;
mov eax, ebx