diff options
author | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 13:24:52 +0800 |
---|---|---|
committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:11:03 +0800 |
commit | c838b225d4362ae312329e700bd51157a6e88772 (patch) | |
tree | 2b142dc7296b212b7705e86e080853c9e373abf7 | |
parent | 1d8c976cbd60255a77dbc14e591cb1239c8f7695 (diff) | |
download | coreboot-c838b225d4362ae312329e700bd51157a6e88772.tar.xz |
fcn_fffc7720 from ghidra
-rw-r--r-- | src/northbridge/intel/haswell/mrc.asm | 344 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/mrc_misc.c | 167 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/mrc_misc.h | 1 |
3 files changed, 168 insertions, 344 deletions
diff --git a/src/northbridge/intel/haswell/mrc.asm b/src/northbridge/intel/haswell/mrc.asm index 38c7281adb..6040017045 100644 --- a/src/northbridge/intel/haswell/mrc.asm +++ b/src/northbridge/intel/haswell/mrc.asm @@ -115,7 +115,6 @@ global fcn_fffbd5ac global fcn_fffbd7da extern fcn_fffc6438 extern mrc_get_timestamp -global fcn_fffc7720 ;; pei_usb @@ -40849,349 +40848,6 @@ pop edi pop ebp ret -fcn_fffc7720: ; not directly referenced -push ebp -xor edx, edx -mov ebp, esp -push edi -push esi -push ebx -lea esp, [esp - 0x1c] -mov esi, dword [ebp + 8] -lea ebx, [esi + 0x16be] -mov dword [esi + 0x1700], 0 -lea edi, [esi + 0x2974] - -loc_fffc7745: ; not directly referenced -imul ecx, edx, 0x1347 -lea eax, [edi + ecx + 8] -mov dword [eax + 0xf1], 0 -cmp dword [ebx + ecx + 0x12be], 2 -jne short loc_fffc77ac ; jne 0xfffc77ac -cmp dword [eax + 0x1151], 2 -jne short loc_fffc7778 ; jne 0xfffc7778 -mov ecx, dword [eax + 0x1222] -mov dword [eax + 0xf1], ecx - -loc_fffc7778: ; not directly referenced -cmp dword [eax + 0x124c], 2 -jne short loc_fffc778d ; jne 0xfffc778d -mov ecx, dword [eax + 0x131d] -add dword [eax + 0xf1], ecx - -loc_fffc778d: ; not directly referenced -mov ecx, dword [esi + 0x1751] -cmp dword [eax + 0xf1], ecx -cmovbe ecx, dword [eax + 0xf1] -mov dword [eax + 0xf1], ecx -add dword [esi + 0x1700], ecx - -loc_fffc77ac: ; not directly referenced -inc edx -cmp edx, 2 -jne short loc_fffc7745 ; jne 0xfffc7745 -mov ecx, dword [esi + 0x1700] -mov edx, dword [esi + 0x1053] -mov eax, ecx -sub eax, dword [esi + 0x104f] -cmp byte [esi + 0x16b3], 0 -mov dword [esi + 0x16db], eax -je short loc_fffc77ed ; je 0xfffc77ed -cmp ecx, 0x1000 -ja short loc_fffc77ed ; ja 0xfffc77ed -mov ebx, ecx -mov ecx, 0x1000 -shr ebx, 1 -sub ecx, ebx -cmp edx, ecx -cmovb edx, ecx - -loc_fffc77ed: ; not directly referenced -mov ebx, dword [esi + 0x1724] -mov edi, eax -mov ecx, ebx -sub ecx, edx -mov edx, ecx -mov ecx, dword [esi + 0x1728] -lea edx, [edx + ecx + 0x1000] -cmp edx, eax -cmovbe edi, edx -mov edx, edi -mov dword [esi + 0x16df], edi -sub edx, ebx -mov dword [esi + 0x16e3], edx -mov dword [ebp - 0x1c], edx -sub edx, ecx -xor ecx, ecx -mov dword [esi + 0x16e7], edx -mov dword [ebp - 0x20], edx -mov edx, dword [esi + 0x103b] -cmp byte [esi + 0x102d], 1 -sete cl -shl ecx, 0xe -mov dword [ebp - 0x24], ecx -mov ecx, 3 -mov edx, dword [edx + 0x50] -and dh, 0xbc -cmp dword [esi + 0x1728], 3 -cmovbe ecx, dword [esi + 0x1728] -or edx, dword [ebp - 0x24] -and ecx, 3 -shl ecx, 8 -or edx, ecx -cmp ebx, 0x400 -jne short loc_fffc7877 ; jne 0xfffc7877 -and dl, 7 -or dl, 0x88 -jmp short loc_fffc7894 ; jmp 0xfffc7894 - -loc_fffc7877: ; not directly referenced -cmp ebx, 0x3ff -mov cl, 0x1f -ja short loc_fffc7889 ; ja 0xfffc7889 -mov ecx, ebx -shr ecx, 5 -and ecx, 0x1f - -loc_fffc7889: ; not directly referenced -and ecx, 0x1f -and dl, 7 -shl ecx, 3 -or edx, ecx - -loc_fffc7894: ; not directly referenced -mov ebx, dword [esi + 0x1057] -mov dword [esi + 0x16eb], edx -mov edx, dword [esi + 0x105f] -mov ecx, dword [ebp - 0x20] -mov dword [esi + 0x171c], edx -mov edx, ebx -sub ecx, ebx -neg edx -and edx, ecx -sub ecx, edx -mov dword [esi + 0x16ef], edx -je short loc_fffc78e1 ; je 0xfffc78e1 -mov edx, dword [ebp - 0x20] -sub edx, ecx -mov dword [esi + 0x16e7], edx -mov edx, dword [ebp - 0x1c] -sub edx, ecx -mov dword [esi + 0x16e3], edx -mov edx, edi -sub edx, ecx -mov dword [esi + 0x16df], edx - -loc_fffc78e1: ; not directly referenced -cmp byte [esi + 0x1030], 0 -je short loc_fffc7941 ; je 0xfffc7941 -mov edx, dword [esi + 0x16df] -cmp eax, edx -jbe short loc_fffc7941 ; jbe 0xfffc7941 -cmp eax, 0x1000 -mov ebx, 0x1000 -mov ecx, ebx -mov byte [esi + 0x16f3], 1 -cmovae ecx, eax -cmova eax, ebx -add eax, ecx -mov dword [esi + 0x16f4], ecx -sub eax, edx -cmp dword [esi + 0x1005], HASWELL_FAMILY_MOBILE -mov dword [esi + 0x16f8], eax -mov dword [esi + 0x16fc], eax -jne short loc_fffc7938 ; jne 0xfffc7938 -cmp dword [esi + 0x1001], 1 -je short loc_fffc794e ; je 0xfffc794e - -loc_fffc7938: ; not directly referenced -dec eax -mov dword [esi + 0x16f8], eax -jmp short loc_fffc794e ; jmp 0xfffc794e - -loc_fffc7941: ; not directly referenced -mov byte [esi + 0x16f3], 0 -mov dword [esi + 0x16fc], eax - -loc_fffc794e: ; not directly referenced -cmp byte [esi + 0x173c], 0 -je short loc_fffc79c0 ; je 0xfffc79c0 -cmp byte [esi + 0x16b3], 0 -je short loc_fffc797c ; je 0xfffc797c -cmp dword [esi + 0x1700], 0x1000 -ja short loc_fffc7974 ; ja 0xfffc7974 -mov eax, dword [esi + 0x16fc] -jmp short loc_fffc7988 ; jmp 0xfffc7988 - -loc_fffc7974: ; not directly referenced -mov eax, dword [esi + 0x16db] -jmp short loc_fffc7988 ; jmp 0xfffc7988 - -loc_fffc797c: ; not directly referenced -mov eax, dword [esi + 0x16ef] -sub eax, dword [esi + 0x105f] - -loc_fffc7988: ; not directly referenced -movzx edx, byte [esi + 0x173e] -shl edx, 3 -mov dword [esi + 0x1710], edx -not edx -add eax, edx -movzx edx, byte [esi + 0x173d] -and eax, 0xfffffff0 -shl edx, 3 -mov dword [esi + 0x170c], eax -sub eax, edx -mov dword [esi + 0x1718], edx -sub eax, 0x10 -mov dword [esi + 0x1714], eax - -loc_fffc79c0: ; not directly referenced -mov eax, dword [esi + 0x16db] -mov edi, dword [esi + 0x1700] -mov dword [esi + 0x1704], eax -mov ecx, dword [esi + 0x103b] -mov eax, dword [esi + 0x104f] -xor edx, edx -mov dword [esi + 0x1708], eax -mov eax, edi -shr edi, 0xc -and edx, 0xffffff80 -and edi, 0x7f -mov ebx, dword [esi + 0x1047] -shl eax, 0x14 -or edx, edi -mov dword [ecx + 0xa0], eax -mov dword [ecx + 0xa4], edx -movzx eax, word [esi + 0x16df] -xor edx, edx -shl eax, 0x14 -and edx, 0xffffff80 -mov dword [ecx + 0xbc], eax -mov edi, dword [esi + 0x16fc] -mov eax, edi -shr edi, 0xc -shl eax, 0x14 -and edi, 0x7f -or edx, edi -mov dword [ecx + 0xa8], eax -mov dword [ecx + 0xac], edx -cmp byte [esi + 0x16f3], 0 -je short loc_fffc7a8d ; je 0xfffc7a8d -mov edi, dword [esi + 0x16f4] -xor edx, edx -mov eax, edi -and edx, 0xffffff80 -shr edi, 0xc -shl eax, 0x14 -and edi, 0x7f -or edx, edi -mov dword [ecx + 0x90], eax -mov dword [ecx + 0x94], edx -mov edi, dword [esi + 0x16f8] -mov eax, edi -xor edx, edx -shr edi, 0xc -and edx, 0xffffff80 -shl eax, 0x14 -and edi, 0x7f -or edx, edi -mov dword [ecx + 0x98], eax -mov dword [ecx + 0x9c], edx - -loc_fffc7a8d: ; not directly referenced -movzx eax, word [esi + 0x16ef] -shl eax, 0x14 -mov dword [ecx + 0xb8], eax -mov edx, dword [esi + 0x171c] -test edx, edx -je short loc_fffc7abd ; je 0xfffc7abd -movzx edx, dl -mov eax, dword [ecx + 0x5c] -shl edx, 4 -and eax, 0xfffff00f -or eax, edx -or eax, 4 -mov dword [ecx + 0x5c], eax - -loc_fffc7abd: ; not directly referenced -movzx eax, word [esi + 0x16e3] -shl eax, 0x14 -mov dword [ecx + 0xb0], eax -movzx eax, word [esi + 0x16e7] -shl eax, 0x14 -mov dword [ecx + 0xb4], eax -mov edx, dword [esi + 0x1708] -test edx, edx -je short loc_fffc7b35 ; je 0xfffc7b35 -mov eax, 0x80000 -mov dword [ebp - 0x14], 0 -sub eax, edx -mov edx, eax -shl edx, 0x14 -shr eax, 0xc -or dh, 8 -mov dword [ebp - 0x18], edx -mov edx, dword [ebp - 0x14] -and eax, 0x7f -and edx, 0xffffff80 -or edx, eax -mov eax, dword [ebp - 0x18] -mov dword [ecx + 0x78], eax -mov dword [ecx + 0x7c], edx -mov edi, dword [esi + 0x1704] -xor edx, edx -mov eax, edi -and edx, 0xffffff80 -shr edi, 0xc -shl eax, 0x14 -and edi, 0x7f -or edx, edi -mov dword [ecx + 0x70], eax -mov dword [ecx + 0x74], edx - -loc_fffc7b35: ; not directly referenced -mov eax, dword [esi + 0x16eb] -mov dword [ecx + 0x50], eax -mov eax, dword [esi + 0x170c] -shl eax, 0xe -mov dword [ebx + 0x10], eax -mov eax, dword [esi + 0x170c] -and eax, 0x40000 -shr eax, 0x12 -mov dword [ebx + 0x14], eax -mov edx, dword [esi + 0x170c] -mov eax, dword [esi + 0x1710] -add eax, edx -shr eax, 3 -shr edx, 3 -shl eax, 0x10 -or eax, edx -mov dword [ebx + 0x18], eax -mov eax, dword [esi + 0x1714] -shl eax, 0xe -mov dword [ebx + 0x20], eax -mov eax, dword [esi + 0x1714] -and eax, 0x40000 -shr eax, 0x12 -or eax, 4 -mov dword [ebx + 0x24], eax -mov edx, dword [esi + 0x1714] -mov eax, dword [esi + 0x1718] -add eax, edx -shr eax, 3 -shl eax, 0x10 -shr edx, 3 -or eax, edx -mov dword [ebx + 0x28], eax -lea esp, [esp + 0x1c] -pop ebx -xor eax, eax -pop esi -pop edi -pop ebp -ret - loc_fffc7bbe: db 0x00 db 0x00 diff --git a/src/northbridge/intel/haswell/mrc_misc.c b/src/northbridge/intel/haswell/mrc_misc.c index 1c10985bba..33f7334289 100644 --- a/src/northbridge/intel/haswell/mrc_misc.c +++ b/src/northbridge/intel/haswell/mrc_misc.c @@ -1451,3 +1451,170 @@ int fcn_fffa7a1c(void *ramdata) } } while (true); } + +int fcn_fffc7720(void *ramdata) +{ + uint32_t uVar1; + uint32_t uVar2; + uint32_t uVar3; + uint32_t uVar4; + uint32_t uVar5; + int iVar6; + int iVar7; + uint32_t uVar8; + int iVar9; + uint32_t uVar10; + void *ptr0; + + PRINT_FUNC; + + *(uint32_t *)(ramdata + 0x1700) = 0; + for (int i = 0; i < 2; i++) { + ptr0 = (ramdata + i * 0x1347 + 0x297c); + *(uint32_t*)(ptr0 + 0xf1) = 0; + if (*(int *)(ramdata + i * 0x1347 + 0x297c) == 2) { + if (*(int *)(ptr0 + 0x1151) == 2) { + *(uint32_t*)(ptr0 + 0xf1) = *(uint32_t*)(ptr0 + 0x1222); + } + if (*(int *)(ptr0 + 0x124c) == 2) { + *(int *)(ptr0 + 0xf1) = *(int *)(ptr0 + 0xf1) + *(int *)(ptr0 + 0x131d); + } + uint32_t tmp = *(uint32_t*)(ramdata + 0x1751); + if (*(uint32_t*)(ptr0 + 0xf1) < tmp || *(uint32_t*)(ptr0 + 0xf1) == tmp) { + tmp = *(uint32_t*)(ptr0 + 0xf1); + } + *(uint32_t*)(ptr0 + 0xf1) = tmp; + *(int *)(ramdata + 0x1700) = *(int *)(ramdata + 0x1700) + tmp; + } + } + uVar2 = *(uint32_t*)(ramdata + 0x1700); + uVar8 = *(uint32_t*)(ramdata + 0x1053); + uVar1 = uVar2 - *(int *)(ramdata + 0x104f); + *(uint32_t*)(ramdata + 0x16db) = uVar1; + if (((*(char *)(ramdata + 0x16b3) != '\0') && (uVar2 < 0x1001)) && + (uVar2 = 0x1000 - (uVar2 >> 1), uVar8 < uVar2)) { + uVar8 = uVar2; + } + uVar10 = *(uint32_t*)(ramdata + 0x1724); + uVar2 = (uVar10 - uVar8) + 0x1000 + *(int *)(ramdata + 0x1728); + uVar8 = uVar1; + if (uVar2 <= uVar1) { + uVar8 = uVar2; + } + *(uint32_t*)(ramdata + 0x16df) = uVar8; + iVar7 = uVar8 - uVar10; + *(int *)(ramdata + 0x16e3) = iVar7; + iVar9 = iVar7 - *(int *)(ramdata + 0x1728); + *(int *)(ramdata + 0x16e7) = iVar9; + uVar3 = (uint32_t)(*(char *)(ramdata + 0x102d) == '\x01') << 0xe; + uVar4 = 3; + uVar2 = pci_read_config32(PCI_DEV(0, 0, 0), 0x50); + if (*(uint32_t*)(ramdata + 0x1728) < 4) { + uVar4 = *(uint32_t*)(ramdata + 0x1728); + } + uVar4 = (uVar4 & 3) << 8; + if (uVar10 == 0x400) { + uVar2 = (uVar2 & 0xffffbc07) | uVar3 | uVar4 | 0x88; + } else { + uVar5 = 0x1f; + if (uVar10 < 0x400) { + uVar5 = (uVar10 >> 5) & 0x1f; + } + uVar2 = (uVar2 & 0xffffbc07) | uVar3 | uVar4 | uVar5 << 3; + } + *(uint32_t*)(ramdata + 0x16eb) = uVar2; + *(uint32_t*)(ramdata + 0x171c) = *(uint32_t*)(ramdata + 0x105f); + uVar2 = iVar9 - *(int *)(ramdata + 0x1057); + uVar10 = (-*(int *)(ramdata + 0x1057)) & uVar2; + iVar6 = uVar2 - uVar10; + *(uint32_t*)(ramdata + 0x16ef) = uVar10; + if (iVar6 != 0) { + *(int *)(ramdata + 0x16e7) = iVar9 - iVar6; + *(int *)(ramdata + 0x16e3) = iVar7 - iVar6; + *(int *)(ramdata + 0x16df) = uVar8 - iVar6; + } + if ((*(char *)(ramdata + 0x1030) == '\0') || (uVar1 <= *(uint32_t*)(ramdata + 0x16df))) { + *(uint8_t*)(ramdata + 0x16f3) = 0; + *(uint32_t*)(ramdata + 0x16fc) = uVar1; + } else { + *(uint8_t*)(ramdata + 0x16f3) = 1; + uVar2 = 0x1000; + if (0xfff < uVar1) { + uVar2 = uVar1; + } + if (0x1000 < uVar1) { + uVar1 = 0x1000; + } + *(uint32_t*)(ramdata + 0x16f4) = uVar2; + iVar7 = (uVar1 + uVar2) - *(uint32_t*)(ramdata + 0x16df); + *(int *)(ramdata + 0x16f8) = iVar7; + *(int *)(ramdata + 0x16fc) = iVar7; + if ((*(int *)(ramdata + 0x1005) != 0x306c0) || (*(int *)(ramdata + 0x1001) != 1)) { + *(int *)(ramdata + 0x16f8) = iVar7 + -1; + } + } + if (*(char *)(ramdata + 0x173c) != '\0') { + if (*(char *)(ramdata + 0x16b3) == '\0') { + iVar7 = *(int *)(ramdata + 0x16ef) - *(int *)(ramdata + 0x105f); + } else { + if (*(uint32_t*)(ramdata + 0x1700) < 0x1001) { + iVar7 = *(int *)(ramdata + 0x16fc); + } + else { + iVar7 = *(int *)(ramdata + 0x16db); + } + } + uVar2 = (uint32_t)(*(uint8_t*)(ramdata + 0x173e)) << 3; + *(uint32_t*)(ramdata + 0x1710) = uVar2; + uVar2 = (iVar7 + ~uVar2) & 0xfffffff0; + *(uint32_t*)(ramdata + 0x170c) = uVar2; + *(int *)(ramdata + 0x1718) = (uint32_t)(*(uint8_t*)(ramdata + 0x173d)) * 8; + *(int *)(ramdata + 0x1714) = uVar2 + (uint32_t)(*(uint8_t*)(ramdata + 0x173d)) * (-8) + -0x10; + } + uVar2 = *(uint32_t*)(ramdata + 0x1700); + *(uint32_t*)(ramdata + 0x1704) = *(uint32_t*)(ramdata + 0x16db); + iVar7 = *(int *)(ramdata + 0x103b); // pciexbar + *(uint32_t*)(ramdata + 0x1708) = *(uint32_t*)(ramdata + 0x104f); + void *gdxcbar = *(void**)(ramdata + 0x1047); + pci_write_config32(PCI_DEV(0, 0, 0), 0xa0, uVar2 << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0xa4, (uVar2 >> 0xc) & 0x7f); + pci_write_config32(PCI_DEV(0, 0, 0), 0xbc, ((uint32_t)(*(uint16_t*)(ramdata + 0x16df))) << 0x14); + uVar2 = *(uint32_t*)(ramdata + 0x16fc); + pci_write_config32(PCI_DEV(0, 0, 0), 0xa8, uVar2 << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0xac, (uVar2 >> 0xc) & 0x7f); + if (*(char *)(ramdata + 0x16f3) != '\0') { + uVar2 = *(uint32_t*)(ramdata + 0x16f4); + pci_write_config32(PCI_DEV(0, 0, 0), 0x90, uVar2 << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0x94, (uVar2 >> 0xc) & 0x7f); + uVar2 = *(uint32_t*)(ramdata + 0x16f8); + pci_write_config32(PCI_DEV(0, 0, 0), 0x98, uVar2 << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0x9c, (uVar2 >> 0xc) & 0x7f); + } + pci_write_config32(PCI_DEV(0, 0, 0), 0xb8, (uint32_t)(*(uint16_t*)(ramdata + 0x16ef)) << 0x14); + if (*(uint32_t*)(ramdata + 0x171c) != 0) { + pci_update_config32(PCI_DEV(0, 0, 0), 0x5c, 0xfffff00f, + ((*(uint32_t*)(ramdata + 0x171c) & 0xff) << 4) | 4); + } + pci_write_config32(PCI_DEV(0, 0, 0), 0xb0, (uint32_t)(*(uint16_t*)(ramdata + 0x16e3)) << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0xb4, (uint32_t)(*(uint16_t*)(ramdata + 0x16e7)) << 0x14); + iVar6 = *(int *)(ramdata + 0x1708); + if (iVar6 != 0) { + pci_write_config32(PCI_DEV(0, 0, 0), 0x78, ((0x80000 - iVar6) << 20) | 0x800); + pci_write_config32(PCI_DEV(0, 0, 0), 0x7c, ((0x80000 - iVar6) >> 0xc) & 0x7f); + uVar2 = *(uint32_t*)(ramdata + 0x1704); + pci_write_config32(PCI_DEV(0, 0, 0), 0x70, uVar2 << 0x14); + pci_write_config32(PCI_DEV(0, 0, 0), 0x74, (uVar2 >> 0xc) & 0x7f); + } + pci_write_config32(PCI_DEV(0, 0, 0), 0x50, *(uint32_t*)(ramdata + 0x16eb)); + *(int *)(gdxcbar + 0x10) = *(int *)(ramdata + 0x170c) << 0xe; + *(uint32_t*)(gdxcbar + 0x14) = (*(uint32_t*)(ramdata + 0x170c) & 0x40000) >> 0x12; + *(uint32_t*)(gdxcbar + 0x18) = + (((*(int *)(ramdata + 0x1710) + *(uint32_t*)(ramdata + 0x170c)) >> 3) << 0x10) | + (*(uint32_t*)(ramdata + 0x170c) >> 3); + *(int *)(gdxcbar + 0x20) = *(int *)(ramdata + 0x1714) << 0xe; + *(uint32_t*)(gdxcbar + 0x24) = ((*(uint32_t*)(ramdata + 0x1714) & 0x40000) >> 0x12) | 4; + *(uint32_t*)(gdxcbar + 0x28) = + ((*(int *)(ramdata + 0x1718) + *(uint32_t*)(ramdata + 0x1714)) >> 3) << 0x10 | + (*(uint32_t*)(ramdata + 0x1714) >> 3); + return 0; +} diff --git a/src/northbridge/intel/haswell/mrc_misc.h b/src/northbridge/intel/haswell/mrc_misc.h index 5c1756b3a6..fc4db0e296 100644 --- a/src/northbridge/intel/haswell/mrc_misc.h +++ b/src/northbridge/intel/haswell/mrc_misc.h @@ -55,3 +55,4 @@ DECL_CB1(fcn_fffb7866); int fcn_fffb8689(void *ramdata); int fcn_fffa7a1c(void *ramdata); +int fcn_fffc7720(void *ramdata); |