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author | Iru Cai <mytbk920423@gmail.com> | 2019-11-13 20:24:10 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:10:47 +0800 |
commit | e0c24512bdb80bf3526e6ea17b9eb1d9d1417f9e (patch) | |
tree | 46007d6953689b0592bfc55161bbdb5d6d893d50 | |
parent | 6a7f88b9d743aa7d3c38a8097dd97b03c19d2e9a (diff) | |
download | coreboot-e0c24512bdb80bf3526e6ea17b9eb1d9d1417f9e.tar.xz |
fcn_fffb5038 from ghidra
-rw-r--r-- | src/northbridge/intel/haswell/mrc.asm | 104 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/mrc_misc.c | 53 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/mrc_misc.h | 3 |
3 files changed, 57 insertions, 103 deletions
diff --git a/src/northbridge/intel/haswell/mrc.asm b/src/northbridge/intel/haswell/mrc.asm index f5bb715db7..8914c0dab0 100644 --- a/src/northbridge/intel/haswell/mrc.asm +++ b/src/northbridge/intel/haswell/mrc.asm @@ -95,7 +95,7 @@ global fcn_fffae80e global fcn_fffb2e66 global fcn_fffb365a global fcn_fffb3f6c -global fcn_fffb5038 +extern fcn_fffb5038 global fcn_fffb514c global fcn_fffb5535 global fcn_fffb568f @@ -20463,108 +20463,6 @@ pop edi pop ebp ret -fcn_fffb5038: -push ebp -mov ebp, esp -push edi -push esi -mov esi, edx -push ebx -mov ebx, eax -lea esp, [esp - 0x1c] -mov eax, dword [eax + 0x103f] -test edx, edx -mov dword [ebp - 0x24], ecx -mov edi, dword [eax + 0x5e00] -mov eax, dword [eax + 0x5e04] -mov dword [ebp - 0x20], edi -mov dword [ebp - 0x1c], eax -je short loc_fffb50cb ; je 0xfffb50cb -mov edx, edi -mov eax, dword [ebx + 0xff9] -shr edx, 4 -mov edi, 0x186a0 -and edx, 0xf -test eax, eax -mov byte [ebp - 0x25], dl -mov edx, 0x5f5e100 -cmove eax, edx -xor edx, edx -div edi -mov ecx, 0x3b9aca00 -cmp byte [ebp - 0x25], 1 -mov edx, 0x4f790d55 -cmovne ecx, edx -mov edx, dword [ebp - 0x1c] -and edx, 0xf -mul edx -mov edi, edx -imul edi, ecx -mul ecx -xor ecx, ecx -add edx, edi -mov edi, edx -or edi, eax -je short loc_fffb50c9 ; je 0xfffb50c9 -push edx -push eax -push 0x8ac72304 -push 0x89e80000 -call udiv64 ; call 0xfffc91d0 -mov ecx, eax -add esp, 0x10 - -loc_fffb50c9: -mov dword [esi], ecx - -loc_fffb50cb: -cmp dword [ebp - 0x24], 0 -je short loc_fffb50dc ; je 0xfffb50dc -mov edx, dword [ebp - 0x24] -mov al, byte [ebp - 0x1c] -and eax, 0xf -mov byte [edx], al - -loc_fffb50dc: -cmp dword [ebp + 8], 0 -je short loc_fffb50f0 ; je 0xfffb50f0 -mov edi, dword [ebp + 8] -mov eax, dword [ebp - 0x20] -shr eax, 4 -and eax, 0xf -mov dword [edi], eax - -loc_fffb50f0: -mov ecx, dword [ebp - 0x20] -mov edx, dword [ebx + 0xff9] -shr ecx, 4 -mov eax, 0x5f5e100 -and ecx, 0xf -test edx, edx -push 0x5af3 -cmovne eax, edx -dec cl -mov edx, 0xbebc200 -mov ecx, 0xfe502ab -cmovne edx, ecx -mov ecx, dword [ebp - 0x1c] -and ecx, 0xf -imul eax, ecx -mul edx -add eax, 0x883d2000 -push 0x107a4000 -adc edx, 0x2d79 -push edx -push eax -call udiv64 ; call 0xfffc91d0 -add esp, 0x10 -lea esp, [ebp - 0xc] -pop ebx -pop esi -pop edi -pop ebp -ret - loc_fffb514a: db 0x00 db 0x00 diff --git a/src/northbridge/intel/haswell/mrc_misc.c b/src/northbridge/intel/haswell/mrc_misc.c index b20f85ff90..e6dbf005ee 100644 --- a/src/northbridge/intel/haswell/mrc_misc.c +++ b/src/northbridge/intel/haswell/mrc_misc.c @@ -893,3 +893,56 @@ int MRCABI do_smbus_op(EFI_SMBUS_OPERATION op, u32 addr_desc, void *buf, int *re return length; } + +uint64_t MRCABI +fcn_fffb5038(void *ram_data,uint32_t *param_2,uint8_t *param_3,uint32_t *param_4) +{ + uint32_t uVar1; + uint64_t uVar2; + uint64_t lVar3; + uint32_t uVar4; + int iVar5; + uint32_t uVar6; + uint32_t uVar7; + uint32_t uVar8; + uint64_t uVar9; + uint8_t local_20; + + uVar6 = *(uint32_t *)(*(void **)(ram_data + 0x103f) + 0x5e00); + uVar1 = *(uint32_t *)(*(void **)(ram_data + 0x103f) + 0x5e04); + if (param_2 != NULL) { + uVar4 = *(uint32_t *)(ram_data + 0xff9); + if (uVar4 == 0) { + uVar4 = 100000000; + } + uVar7 = 1000000000; + if (((uint8_t)(uVar6 >> 4) & 0xf) != 1) { + uVar7 = 0x4f790d55; // 1333333333 + } + uVar2 = ((uint64_t)uVar4 / 100000) * (uint64_t)(uVar1 & 0xf) * (uint64_t)uVar7; + uVar8 = 0; + if (uVar2 != 0) { + uVar9 = udiv64(10000000000000000000ULL,uVar2); + uVar8 = (uint32_t)uVar9; + } + *param_2 = uVar8; + } + if (param_3 != NULL) { + local_20 = (uint8_t)uVar1; + *param_3 = local_20 & 0xf; + } + if (param_4 != NULL) { + *param_4 = uVar6 >> 4 & 0xf; + } + iVar5 = 100000000; + if (*(int *)(ram_data + 0xff9) != 0) { + iVar5 = *(int *)(ram_data + 0xff9); + } + uVar4 = 200000000; + if (((uint8_t)(uVar6 >> 4) & 0xf) != 1) { + uVar4 = 0xfe502ab; // 266666667 + } + lVar3 = (uint64_t)(iVar5 * (uVar1 & 0xf)) * (uint64_t)uVar4; + uVar9 = udiv64(lVar3 + 50000000000000ULL, 100000000000000ULL); + return uVar9; +} diff --git a/src/northbridge/intel/haswell/mrc_misc.h b/src/northbridge/intel/haswell/mrc_misc.h index 233ccae84e..bbfc6d6429 100644 --- a/src/northbridge/intel/haswell/mrc_misc.h +++ b/src/northbridge/intel/haswell/mrc_misc.h @@ -8,3 +8,6 @@ void dmi_check_link(void); void __attribute((regparm(2))) rtc_wait(void *, uint16_t); uint8_t __attribute((regparm(1))) pci_setup_bridge(uint8_t bus); int MRCABI do_smbus_op(EFI_SMBUS_OPERATION op, u32 addr_desc, void *buf, int *retcode); +uint64_t MRCABI +fcn_fffb5038(void *ram_data,uint32_t *param_2,uint8_t *param_3,uint32_t *param_4); +uint64_t udiv64(uint64_t, uint64_t); |