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author | Subrata Banik <subrata.banik@intel.com> | 2019-05-31 16:09:56 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-04 01:54:15 +0000 |
commit | ef1ab4d6d47c87d976c8186d5d8651853e3c92a9 (patch) | |
tree | a039b46bda10985baeb6f15047efd9bf0890ac68 | |
parent | 8a2056cac4995dbb69b7e2f2b2a0ca0c5657d5ad (diff) | |
download | coreboot-ef1ab4d6d47c87d976c8186d5d8651853e3c92a9.tar.xz |
arch/riscv/Kconfig: Make correct default value for CONFIG_ARCH_RISCV_M
Change-Id: Ib9329904060cab48d527de1b1ccdab5b6fe71b99
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33144
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/arch/riscv/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index 9d325af759..25a398068a 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -24,8 +24,8 @@ config ARCH_RISCV_M # one implementation that will not have it due # to security concerns. bool - default n if ARCH_RISCV_M_DISABLED - default y + default y if ARCH_RISCV && !ARCH_RISCV_M_DISABLED + default n config ARCH_RISCV_S # S (supervisor) mode is for kernels. It is optional. |