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| author | Martin Roth <martinroth@google.com> | 2015-11-05 08:06:54 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-17 00:12:35 +0100 |
| commit | 0307e0a4990445d32ee637921dab245554a94c3f (patch) | |
| tree | d667aa24dc7836d6746017a9ece3e87035f8e37b | |
| parent | 66a476ad5f29553ad7c46e58eb35faa7a059a5af (diff) | |
| download | coreboot-0307e0a4990445d32ee637921dab245554a94c3f.tar.xz | |
fsp_baytrail: use external microcode .h files
The microcode for Bay Trail that's in the blobs repo is for the
M and D chip variants only. The fsp_baytrail directory is for
Bay Trail I chip variants, and will not boot if the M/D microcode
is used. The microcode for the I variant is supplied as part
of the Bay Trail FSP package.
Change-Id: I5493deb1626dc3cf037053e13e092f5a1143a13a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12334
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Makefile.inc | 2 |
2 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 7e7f217459..ff233083d4 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -46,6 +46,9 @@ config CPU_SPECIFIC_OPTIONS select HAVE_INTEL_FIRMWARE select HAVE_SPI_CONSOLE_SUPPORT + # Microcode header files are delivered in FSP package + select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN + config SOC_INTEL_FSP_BAYTRAIL_MD bool default n @@ -98,6 +101,10 @@ config VGA_BIOS_FILE string default "../intel/cpu/baytrail/vbios/Vga.dat" if VGA_BIOS +config CPU_MICROCODE_HEADER_FILES + string + default "../intel/cpu/baytrail/microcode/M0130673322.h ../intel/cpu/baytrail/microcode/M0130679901.h ../intel/cpu/baytrail/microcode/M0230672228.h" + ## Baytrail Specific FSP Kconfig source src/soc/intel/fsp_baytrail/fsp/Kconfig diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index f0b69ae69d..54ad88a6fa 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -55,8 +55,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c ramstage-y += placeholders.c ramstage-y += i2c.c -cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin - CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/ CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp |