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authorPatrick Georgi <pgeorgi@chromium.org>2015-06-30 12:48:45 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-30 21:33:27 +0200
commit03decc0c5e988ce9af20ebe1e3e52e495251d0a5 (patch)
tree9ea5ff7787e65f4d180bc48a9d2405d5681a7573
parentea31f6333648ff25694a5e706c137052d1082aff (diff)
downloadcoreboot-03decc0c5e988ce9af20ebe1e3e52e495251d0a5.tar.xz
intel/sandybridge: initialize variable
Otherwise cache_base may be uninitialized. Change-Id: Ie91f9567cea24114723a5362f52052d6ec22a6b8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10724 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 94a7c396fb..f89fc0fa98 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -72,7 +72,8 @@ static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
region_size = region_device_sz(&rdev);
*mrc_region_ptr = rdev_mmap_full(&rdev);
- }
+ } else
+ *mrc_region_ptr = NULL;
} else {
*mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",
CBFS_TYPE_MRC_CACHE,