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authorEdward Hill <ecgh@chromium.org>2018-12-18 20:19:36 -0700
committerMartin Roth <martinroth@google.com>2018-12-19 16:05:20 +0000
commit0ca3a0792d550ef75b3a1b207f4bf04eb83e507f (patch)
tree58ed49f7cc83c04d31285184be16b41a0174ceb1
parentd652a92a6a9e846347e5a97bf2f986b09b9b7d2f (diff)
downloadcoreboot-0ca3a0792d550ef75b3a1b207f4bf04eb83e507f.tar.xz
amd/stoneyridge: Clear SMI_EVENT_STATUS when entering S3/S5
disable_all_smi_status() was not clearing SMI_EVENT_STATUS. This caused us to complain in the eventlog (ELOG_SLEEP_PENDING_GPE0_WAKE) and then wake early from sleep when waiting for a cr50 reset to turn on a cr50 update. BUG=b:121203745 TEST=Careena remains in S5 until cr50 reset after cr50 update, and ELOG_SLEEP_PENDING_GPE0_WAKE is no longer seen in eventlog. Change-Id: I2eec014109249d5c3574c4dbdec5569e2a0bfc8e Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://review.coreboot.org/c/30304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/soc/amd/stoneyridge/smihandler.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c
index a662bc5d37..4854e52553 100644
--- a/src/soc/amd/stoneyridge/smihandler.c
+++ b/src/soc/amd/stoneyridge/smihandler.c
@@ -113,6 +113,7 @@ static void sb_apmc_smi_handler(void)
static void disable_all_smi_status(void)
{
smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
+ smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS));
smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0));
smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1));
smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2));