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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-08-08 12:22:10 +0300 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-08-08 10:18:37 +0000 |
| commit | 0da148e326f140ebdb9ef26e864ef453bc36bdfa (patch) | |
| tree | 365b6d196dee243a062646dae71761becef2ef66 | |
| parent | 49641cadeaa8b52ba2b856a6e7143f4c8e1ecf88 (diff) | |
| download | coreboot-0da148e326f140ebdb9ef26e864ef453bc36bdfa.tar.xz | |
mb/asrock/h110m: remove unused Device4Enable from devtree
This option has been removed from the parameters structure for Intel
Skylake CPU (commit 9c1c009).
Change-Id: I9dc6649ad693d18fdc85046ebbcc730a17fed0bf
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner
| -rw-r--r-- | src/mainboard/asrock/h110m/devicetree.cb | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 68ef2a4044..6de2a63db1 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -152,9 +152,7 @@ chip soc/intel/skylake device pci 02.0 on # Integrated Graphics Device subsystemid 0x1849 0x1912 end - device pci 04.0 on # Thermal Subsystem - register "Device4Enable" = "1" - end + device pci 04.0 on end # Thermal Subsystem device pci 08.0 off end # Gaussian Mixture Model device pci 14.0 on # USB xHCI subsystemid 0x1849 0xa131 |