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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-08 01:51:32 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-08 01:51:32 +0000 |
| commit | 160361a1dfcee61c546f0039bbd235f3d45b2619 (patch) | |
| tree | f9045e1805cc4dfd182618cd7427b5378d44b139 | |
| parent | f27a3eba4dbe35a825a6fcbe95a955cfdca5dac6 (diff) | |
| download | coreboot-160361a1dfcee61c546f0039bbd235f3d45b2619.tar.xz | |
The POST_CODE macro had the outb() argument order backwards.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/northbridge/amd/gx2/pll_reset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c index bac0e34525..5e6b68ace6 100644 --- a/src/northbridge/amd/gx2/pll_reset.c +++ b/src/northbridge/amd/gx2/pll_reset.c @@ -115,7 +115,7 @@ static unsigned int get_memory_speed(void) #if USE_GOODRICH_VERSION /////////////////////////////////////////////////////////////////////////////// // Goodrich Version of pll_reset -#define POST_CODE(x) outb(0x80, x) +#define POST_CODE(x) outb(x, 0x80) // PLLCHECK_COMPLETED is the "we've already done this" flag #define PLLCHECK_COMPLETED (1 << RSTPLL_LOWER_SWFLAGS_SHIFT) |