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authorNaveen Manohar <naveen.m@intel.com>2019-04-11 20:25:42 +0530
committerFurquan Shaikh <furquan@google.com>2019-04-30 20:36:33 +0000
commit2b8789bb3bf186b64ead7a92c341eb70ed57bbcf (patch)
treeb66e40ed14a49e296e48f0e04891394dddf0f82c
parent345d202d662fae57ab7a13432f213cd4109e5e3c (diff)
downloadcoreboot-2b8789bb3bf186b64ead7a92c341eb70ed57bbcf.tar.xz
mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT
Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT. Switching IOAPIC to GpioInt because ACPI Interrupt() doesn't support jack triggering on both edges. BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected. Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Signed-off-by: Naveen Manohar <naveen.m@intel.com> Suggested-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32474 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c4
-rw-r--r--src/mainboard/google/hatch/variants/hatch/overridetree.cb2
-rw-r--r--src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb2
3 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index c12aa640b6..198d930aba 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -346,10 +346,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_G7, DN_20K),
/*
* H0 : HP_INT_L
- * TODO Configure it back to invert mode, when
- * ITSS IPCx configuration is fixed in FSP.
*/
- PAD_CFG_GPI_APIC(GPP_H0, NONE, PLTRST, LEVEL, NONE),
+ PAD_CFG_GPI_INT(GPP_H0, NONE, PLTRST, LEVEL),
/* H1 : CNV_RF_RESET_L */
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
/* H2 : CNV_CLKREQ0 */
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index 13e7766747..4b1b8d85f2 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -132,7 +132,7 @@ chip soc/intel/cannonlake
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
register "property_count" = "1"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
index 15b93f38d4..c5d5964663 100644
--- a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
@@ -117,7 +117,7 @@ chip soc/intel/cannonlake
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
register "property_count" = "1"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"