x86: remove cpu_incs as romstage Make variable

When building up which files to include in romstage there
were both 'cpu_incs' and 'cpu_incs-y' which were used to
generate crt0.S. Remove the former to settle on cpu_incs-y
as the way to be included.

BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built rambi. No include file changes.

Change-Id: I8dc0631f8253c21c670f2f02928225ed5b869ce6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11494
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

36 files changed, 36 insertions, 39 deletions

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 3a8d8d534e..a9d708da95 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -147,7 +147,6 @@ ifeq ($(CONFIG_SSE),y)
 crt0s += $(src)/cpu/x86/sse_enable.inc
 endif
 
-crt0s += $(cpu_incs)
 crt0s += $(cpu_incs-y)
 
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc
index 153b2dbe94..89af28c896 100644
--- a/src/cpu/amd/agesa/Makefile.inc
+++ b/src/cpu/amd/agesa/Makefile.inc
@@ -27,7 +27,7 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb
 romstage-y += s3_resume.c
 ramstage-y += s3_mtrr.c
 
-cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/agesa/cache_as_ram.inc
 
 romstage-y += heapmanager.c
 ramstage-y += heapmanager.c
diff --git a/src/cpu/amd/geode_gx2/Makefile.inc b/src/cpu/amd/geode_gx2/Makefile.inc
index be9e1bef88..1580f746a4 100644
--- a/src/cpu/amd/geode_gx2/Makefile.inc
+++ b/src/cpu/amd/geode_gx2/Makefile.inc
@@ -6,7 +6,7 @@ subdirs-y += ../../x86/smm
 ramstage-y += geode_gx2_init.c
 ramstage-y += cpubug.c
 
-cpu_incs += $(src)/cpu/amd/geode_gx2/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/geode_gx2/cache_as_ram.inc
 
 cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa
 vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa
diff --git a/src/cpu/amd/geode_lx/Makefile.inc b/src/cpu/amd/geode_lx/Makefile.inc
index 9edb332b4b..22a3fda49c 100644
--- a/src/cpu/amd/geode_lx/Makefile.inc
+++ b/src/cpu/amd/geode_lx/Makefile.inc
@@ -6,7 +6,7 @@ subdirs-y += ../../x86/smm
 ramstage-y += geode_lx_init.c
 ramstage-y += cpubug.c
 
-cpu_incs += $(src)/cpu/amd/geode_lx/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/geode_lx/cache_as_ram.inc
 
 cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa
 vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa
diff --git a/src/cpu/amd/pi/Makefile.inc b/src/cpu/amd/pi/Makefile.inc
index 5a407b294b..2b9c3ff4d6 100644
--- a/src/cpu/amd/pi/Makefile.inc
+++ b/src/cpu/amd/pi/Makefile.inc
@@ -25,7 +25,7 @@ romstage-y += s3_resume.c
 ramstage-y += s3_resume.c
 ramstage-$(CONFIG_SPI_FLASH) += spi.c
 
-cpu_incs += $(src)/cpu/amd/pi/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/pi/cache_as_ram.inc
 
 romstage-y += heapmanager.c
 ramstage-y += heapmanager.c
diff --git a/src/cpu/amd/socket_754/Makefile.inc b/src/cpu/amd/socket_754/Makefile.inc
index 264fd6ca8b..38421d71c0 100644
--- a/src/cpu/amd/socket_754/Makefile.inc
+++ b/src/cpu/amd/socket_754/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_939/Makefile.inc b/src/cpu/amd/socket_939/Makefile.inc
index 264fd6ca8b..38421d71c0 100644
--- a/src/cpu/amd/socket_939/Makefile.inc
+++ b/src/cpu/amd/socket_939/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_940/Makefile.inc b/src/cpu/amd/socket_940/Makefile.inc
index 264fd6ca8b..38421d71c0 100644
--- a/src/cpu/amd/socket_940/Makefile.inc
+++ b/src/cpu/amd/socket_940/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_AM2/Makefile.inc b/src/cpu/amd/socket_AM2/Makefile.inc
index 264fd6ca8b..38421d71c0 100644
--- a/src/cpu/amd/socket_AM2/Makefile.inc
+++ b/src/cpu/amd/socket_AM2/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_AM2r2/Makefile.inc b/src/cpu/amd/socket_AM2r2/Makefile.inc
index 327e4a159c..3675af4b32 100644
--- a/src/cpu/amd/socket_AM2r2/Makefile.inc
+++ b/src/cpu/amd/socket_AM2r2/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_AM3/Makefile.inc b/src/cpu/amd/socket_AM3/Makefile.inc
index 327e4a159c..3675af4b32 100644
--- a/src/cpu/amd/socket_AM3/Makefile.inc
+++ b/src/cpu/amd/socket_AM3/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_ASB2/Makefile.inc b/src/cpu/amd/socket_ASB2/Makefile.inc
index 327e4a159c..3675af4b32 100644
--- a/src/cpu/amd/socket_ASB2/Makefile.inc
+++ b/src/cpu/amd/socket_ASB2/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_C32/Makefile.inc b/src/cpu/amd/socket_C32/Makefile.inc
index 327e4a159c..3675af4b32 100644
--- a/src/cpu/amd/socket_C32/Makefile.inc
+++ b/src/cpu/amd/socket_C32/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_F/Makefile.inc b/src/cpu/amd/socket_F/Makefile.inc
index 264fd6ca8b..38421d71c0 100644
--- a/src/cpu/amd/socket_F/Makefile.inc
+++ b/src/cpu/amd/socket_F/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_F_1207/Makefile.inc b/src/cpu/amd/socket_F_1207/Makefile.inc
index 8c5ff3db89..b74862e3e5 100644
--- a/src/cpu/amd/socket_F_1207/Makefile.inc
+++ b/src/cpu/amd/socket_F_1207/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_S1G1/Makefile.inc b/src/cpu/amd/socket_S1G1/Makefile.inc
index 5ad59cd8cf..0babff0d08 100644
--- a/src/cpu/amd/socket_S1G1/Makefile.inc
+++ b/src/cpu/amd/socket_S1G1/Makefile.inc
@@ -10,4 +10,4 @@ subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/smm
 subdirs-y += ../smm
 
-cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index 4297122e69..a4a9c34475 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -16,7 +16,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
 smm-y += monotonic_timer.c
 
-cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/haswell/cache_as_ram.inc
 
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr
diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index dbc093d018..8aa5a5eebe 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -1,5 +1,5 @@
 ramstage-y += model_106cx_init.c
 subdirs-y += ../../x86/name
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram_ht.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
 cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc
index 3da26dd33b..1b5d2ba2d5 100644
--- a/src/cpu/intel/model_2065x/Makefile.inc
+++ b/src/cpu/intel/model_2065x/Makefile.inc
@@ -19,4 +19,4 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 
 cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE)  += microcode_blob.c
 
-cpu_incs += $(src)/cpu/intel/model_2065x/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/model_2065x/cache_as_ram.inc
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc
index 6e0dcf61a9..6f12756936 100644
--- a/src/cpu/intel/model_206ax/Makefile.inc
+++ b/src/cpu/intel/model_206ax/Makefile.inc
@@ -8,4 +8,4 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 
 cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE)  += microcode_blob.c
 
-cpu_incs += $(src)/cpu/intel/model_206ax/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/model_206ax/cache_as_ram.inc
diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc
index d480f78c61..1487f5e929 100644
--- a/src/cpu/intel/slot_1/Makefile.inc
+++ b/src/cpu/intel/slot_1/Makefile.inc
@@ -32,4 +32,4 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc
index 601997241d..2325bb9e32 100644
--- a/src/cpu/intel/socket_BGA956/Makefile.inc
+++ b/src/cpu/intel/socket_BGA956/Makefile.inc
@@ -9,4 +9,4 @@ subdirs-y += ../hyperthreading
 subdirs-y += ../speedstep
 
 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
-cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_FC_PGA370/Makefile.inc b/src/cpu/intel/socket_FC_PGA370/Makefile.inc
index 85454acea8..d9bb2270b0 100644
--- a/src/cpu/intel/socket_FC_PGA370/Makefile.inc
+++ b/src/cpu/intel/socket_FC_PGA370/Makefile.inc
@@ -26,4 +26,4 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc
index 101fd04b65..8235fc52aa 100644
--- a/src/cpu/intel/socket_LGA771/Makefile.inc
+++ b/src/cpu/intel/socket_LGA771/Makefile.inc
@@ -8,4 +8,4 @@ subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 
-cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc
index 3f5dfd0b7e..98b43942bf 100644
--- a/src/cpu/intel/socket_PGA370/Makefile.inc
+++ b/src/cpu/intel/socket_PGA370/Makefile.inc
@@ -26,4 +26,4 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc
index 9e1444dcd2..e247c0966d 100644
--- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc
+++ b/src/cpu/intel/socket_mFCBGA479/Makefile.inc
@@ -6,4 +6,4 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc
index fa03f9346e..749f6abf06 100644
--- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc
+++ b/src/cpu/intel/socket_mFCPGA478/Makefile.inc
@@ -11,4 +11,4 @@ subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 subdirs-y += ../speedstep
 
-cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
diff --git a/src/cpu/intel/socket_mPGA479M/Makefile.inc b/src/cpu/intel/socket_mPGA479M/Makefile.inc
index 7160894ee5..abade4e87e 100644
--- a/src/cpu/intel/socket_mPGA479M/Makefile.inc
+++ b/src/cpu/intel/socket_mPGA479M/Makefile.inc
@@ -9,4 +9,4 @@ subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 
-cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
diff --git a/src/cpu/via/c7/Makefile.inc b/src/cpu/via/c7/Makefile.inc
index 417d762751..8c13d91a92 100644
--- a/src/cpu/via/c7/Makefile.inc
+++ b/src/cpu/via/c7/Makefile.inc
@@ -7,4 +7,4 @@ subdirs-y += ../../intel/microcode
 
 ramstage-y += c7_init.c
 
-cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/via/car/cache_as_ram.inc
diff --git a/src/cpu/via/nano/Makefile.inc b/src/cpu/via/nano/Makefile.inc
index b5d00ecb4a..d3df3fbcc0 100644
--- a/src/cpu/via/nano/Makefile.inc
+++ b/src/cpu/via/nano/Makefile.inc
@@ -30,4 +30,4 @@ ramstage-y += update_ucode.c
 # the rest of coreboot.
 cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
 
-cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/via/car/cache_as_ram.inc
diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc
index a29bf32136..ddc6bef926 100644
--- a/src/drivers/intel/fsp1_0/Makefile.inc
+++ b/src/drivers/intel/fsp1_0/Makefile.inc
@@ -25,9 +25,7 @@ romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
 
 CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0
 
-ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y)
-cpu_incs += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
-endif
+cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
 
 ifeq ($(CONFIG_HAVE_FSP_BIN),y)
 cbfs-files-y += fsp.bin
diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.inc b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
index 7423b2b84b..f9cf252b8a 100644
--- a/src/mainboard/emulation/qemu-i440fx/Makefile.inc
+++ b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
@@ -1,3 +1,3 @@
-cpu_incs += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
 ramstage-y += northbridge.c
 ramstage-y += fw_cfg.c
diff --git a/src/mainboard/emulation/qemu-q35/Makefile.inc b/src/mainboard/emulation/qemu-q35/Makefile.inc
index 0a0f869cf5..fc4374ca83 100644
--- a/src/mainboard/emulation/qemu-q35/Makefile.inc
+++ b/src/mainboard/emulation/qemu-q35/Makefile.inc
@@ -1,3 +1,3 @@
-cpu_incs += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
 ramstage-y += ../qemu-i440fx/northbridge.c
 ramstage-y += ../qemu-i440fx/fw_cfg.c
diff --git a/src/northbridge/intel/i5000/Makefile.inc b/src/northbridge/intel/i5000/Makefile.inc
index 53602ec8d9..726591770a 100644
--- a/src/northbridge/intel/i5000/Makefile.inc
+++ b/src/northbridge/intel/i5000/Makefile.inc
@@ -21,6 +21,6 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I5000),y)
 
 ramstage-y += northbridge.c
 romstage-y += raminit.c
-cpu_incs += src/northbridge/intel/i5000/halt_second_bsp.S
+cpu_incs-y += src/northbridge/intel/i5000/halt_second_bsp.S
 
 endif
diff --git a/src/soc/intel/baytrail/romstage/Makefile.inc b/src/soc/intel/baytrail/romstage/Makefile.inc
index 345037d51f..5086a4e047 100644
--- a/src/soc/intel/baytrail/romstage/Makefile.inc
+++ b/src/soc/intel/baytrail/romstage/Makefile.inc
@@ -1,7 +1,7 @@
-cpu_incs += $(src)/soc/intel/baytrail/romstage/cache_as_ram.inc
+cpu_incs-y += $(src)/soc/intel/baytrail/romstage/cache_as_ram.inc
 romstage-y += romstage.c
 romstage-y += raminit.c
 romstage-$(CONFIG_ENABLE_BUILTIN_COM1) += uart.c
 romstage-y += gfx.c
 romstage-y += pmc.c
-romstage-y += early_spi.c
\ No newline at end of file
+romstage-y += early_spi.c
diff --git a/src/soc/intel/broadwell/romstage/Makefile.inc b/src/soc/intel/broadwell/romstage/Makefile.inc
index ae0f9806fd..161781285c 100644
--- a/src/soc/intel/broadwell/romstage/Makefile.inc
+++ b/src/soc/intel/broadwell/romstage/Makefile.inc
@@ -1,4 +1,4 @@
-cpu_incs += $(src)/soc/intel/broadwell/romstage/cache_as_ram.inc
+cpu_incs-y += $(src)/soc/intel/broadwell/romstage/cache_as_ram.inc
 
 romstage-y += cpu.c
 romstage-y += pch.c