src: Use "foo *bar" instead of "foo* bar"

Change-Id: Ib2bb6cc80ac2bdc389c60c7ffac4bba937f0fca8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26461
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

17 files changed, 41 insertions, 37 deletions

diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c
index 33e5590530..f6f6383c59 100644
--- a/src/drivers/amd/agesa/eventlog.c
+++ b/src/drivers/amd/agesa/eventlog.c
@@ -84,9 +84,9 @@ const char *heap_status_name(int status)
  * 0x6 = AGESA_CRITICAL
  * 0x7 = AGESA_FATAL
  */
-static const char * decodeAGESA_STATUS(AGESA_STATUS sret)
+static const char *decodeAGESA_STATUS(AGESA_STATUS sret)
 {
-	const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
+	const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
 					"AGESA_BOUNDS_CHK", "AGESA_ALERT",
 					"AGESA_WARNING", "AGESA_ERROR",
 					"AGESA_CRITICAL", "AGESA_FATAL"
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 105dacfa60..56a6bdffd5 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -118,7 +118,8 @@ static const unsigned int ctrl_conf_enable_msi_mapping[] = {
 	RES_PCI_IO, PCI_ADDR(0, 0, 0, 0xe0), ~(0x00000000), 0x00010000,	/* Enable MSI mapping on host bridge -- without this Linux cannot use the network device MSI interrupts! */
 };
 
-static void ck804_control(const unsigned int* values, u32 size, uint8_t bus_unit_id)
+static void ck804_control(const unsigned int *values, u32 size,
+			  uint8_t bus_unit_id)
 {
 	unsigned busn[4], io_base[4];
 	int i, ck804_num = 0;
diff --git a/src/mainboard/intel/kunimitsu/spd/spd_util.c b/src/mainboard/intel/kunimitsu/spd/spd_util.c
index a17b519919..676f84d01c 100644
--- a/src/mainboard/intel/kunimitsu/spd/spd_util.c
+++ b/src/mainboard/intel/kunimitsu/spd/spd_util.c
@@ -75,7 +75,7 @@ void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
 
 uintptr_t mainboard_get_spd_data(void)
 {
-	char* spd_file;
+	char *spd_file;
 	int spd_index, spd_span;
 	size_t spd_file_len;
 
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 31c339aeab..ff4f0a397a 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1040,7 +1040,8 @@ static void amdfam10_domain_scan_bus(struct device *dev)
 }
 
 #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
-static int amdfam10_get_smbios_data16(int* count, int handle, unsigned long *current)
+static int amdfam10_get_smbios_data16(int *count, int handle,
+				      unsigned long *current)
 {
 	struct amdmct_memory_info *mem_info;
 	mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);
@@ -1145,7 +1146,8 @@ static uint16_t amdmct_mct_speed_enum_to_mhz(uint8_t speed)
 	}
 }
 
-static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle, unsigned long *current)
+static int amdfam10_get_smbios_data17(int *count, int handle, int parent_handle,
+				      unsigned long *current)
 {
 	struct amdmct_memory_info *mem_info;
 	mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);
diff --git a/src/northbridge/amd/amdht/h3finit.h b/src/northbridge/amd/amdht/h3finit.h
index 45ed3c180c..743ae97065 100644
--- a/src/northbridge/amd/amdht/h3finit.h
+++ b/src/northbridge/amd/amdht/h3finit.h
@@ -168,7 +168,7 @@ typedef struct {
 	 *	@param[in]  u8   node   = The node on which this chain is located
 	 *	@param[in]  u8   link   = The link on the host for this chain
 	 *	@param[out] u8   secBus = Secondary Bus number for this non-coherent chain
-	 *	@param[out] u8*  subBus = Subordinate Bus number
+	 *	@param[out] u8 *subBus = Subordinate Bus number
 	 *	@param[out] BOOL result = true this routine is supplying the bus numbers
 	 *				  false use auto Bus numbering
 	 *
@@ -194,7 +194,7 @@ typedef struct {
 	 * Parameters:
 	 *	@param[in]  u8  node    = The node on which this chain is located
 	 *	@param[in]  u8  link    = The link on the host for this chain
-	 *	@param[out] u8** list   = supply a pointer to a list
+	 *	@param[out] u8 **list   = supply a pointer to a list
 	 *	@param[out] BOOL result = true to use a manual list
 	 *				  false to initialize the link automatically
 	 *
@@ -226,10 +226,10 @@ typedef struct {
 	 *	@param[in]  u8  Dev       = The Device's PCI device Number
 	 *	@param[in]  u32 DevVenID  = The Device's PCI Vendor + Device ID (offset 0x00)
 	 *	@param[in]  u8  Link      = The Device's link number (0 or 1)
-	 *	@param[in,out] u8*  LinkWidthIn  = modify to change the Link Witdh In
-	 *	@param[in,out] u8*  LinkWidthOut  = modify to change the Link Witdh Out
-	 *	@param[in,out] u32* FreqCap = modify to change the link's frequency capability
-	 *	@param[in,out] u32* FeatureCap = modify to change the link's feature capability
+	 *	@param[in,out] u8 *LinkWidthIn  = modify to change the Link Witdh In
+	 *	@param[in,out] u8 *LinkWidthOut  = modify to change the Link Witdh Out
+	 *	@param[in,out] u32 *FreqCap = modify to change the link's frequency capability
+	 *	@param[in,out] u32 *FeatureCap = modify to change the link's feature capability
 	 *
 	 * ---------------------------------------------------------------------------------------
 	 */
@@ -266,9 +266,9 @@ typedef struct {
 	 *	@param[in]  u8  linkA  = The link on this node
 	 *	@param[in]  u8  nodeB  = The other node on which this link is located
 	 *	@param[in]  u8  linkB  = The link on that node
-	 *	@param[in,out]  u8*  ABLinkWidthLimit = modify to change the Link Witdh In
-	 *	@param[in,out]  u8*  BALinkWidthLimit = modify to change the Link Witdh Out
-	 *	@param[in,out]  u32* PCBFreqCap  = modify to change the link's frequency capability
+	 *	@param[in,out]  u8 *ABLinkWidthLimit = modify to change the Link Witdh In
+	 *	@param[in,out]  u8 *BALinkWidthLimit = modify to change the Link Witdh Out
+	 *	@param[in,out]  u32 *PCBFreqCap  = modify to change the link's frequency capability
 	 *
 	 * ---------------------------------------------------------------------------------------
 	 */
@@ -299,9 +299,9 @@ typedef struct {
 	 *	@param[in]  u8  hostNode  = The node on which this link is located
 	 *	@param[in]  u8  hostLink  = The link about to be initialized
 	 *	@param[in]  u8  Depth  = The depth in the I/O chain from the Host
-	 *	@param[in,out]  u8* DownstreamLinkWidthLimit = modify to change the Link Witdh In
-	 *	@param[in,out]  u8* UpstreamLinkWidthLimit  = modify to change the Link Witdh Out
-	 *	@param[in,out]  u32* PCBFreqCap = modify to change the link's frequency capability
+	 *	@param[in,out]  u8 *DownstreamLinkWidthLimit = modify to change the Link Witdh In
+	 *	@param[in,out]  u8 *UpstreamLinkWidthLimit  = modify to change the Link Witdh Out
+	 *	@param[in,out]  u32 *PCBFreqCap = modify to change the link's frequency capability
 	 *
 	 * ---------------------------------------------------------------------------------------
 	 */
@@ -400,9 +400,9 @@ typedef struct {
 	 *	@param[in]  u8   hostLink  = The link about to be initialized
 	 *	@param[in]  u8   Depth     = The depth in the I/O chain from the Host
 	 *	@param[in]  u8   Link      = the link on the device (0 or 1)
-	 *	@param[in,out]  u8*   LinkWidthIn    = modify to change the Link Witdh In
-	 *	@param[in,out]  u8*   LinkWidthOut   = modify to change the Link Witdh Out
-	 *	@param[in,out]  u16*   LinkFrequency = modify to change the link's frequency capability
+	 *	@param[in,out]  u8 *LinkWidthIn    = modify to change the Link Witdh In
+	 *	@param[in,out]  u8 *LinkWidthOut   = modify to change the Link Witdh Out
+	 *	@param[in,out]  u16 *LinkFrequency = modify to change the link's frequency capability
 	 *
 	 * ---------------------------------------------------------------------------------------
 	 */
@@ -431,9 +431,9 @@ typedef struct {
 	 * Parameters:
 	 *	@param[in]  u8  node  = One node on which this link is located
 	 *	@param[in]  u8  link  = The link on this node
-	 *	@param[in,out]  u8*  LinkWidthIn = modify to change the Link Witdh In
-	 *	@param[in,out]  u8*  LinkWidthOut = modify to change the Link Witdh Out
-	 *	@param[in,out]  u16*  LinkFrequency  = modify to change the link's frequency capability
+	 *	@param[in,out]  u8 *LinkWidthIn = modify to change the Link Witdh In
+	 *	@param[in,out]  u8 *LinkWidthOut = modify to change the Link Witdh Out
+	 *	@param[in,out]  u16 *LinkFrequency  = modify to change the link's frequency capability
 	 *
 	 *---------------------------------------------------------------------------------------
 	 */
@@ -459,7 +459,7 @@ typedef struct {
 	 * Parameters:
 	 *	@param[in]  u8  evtClass = What level event is this
 	 *	@param[in]  u16 event = A unique ID of this event
-	 *	@param[in]  u8* pEventData0 = useful data associated with the event.
+	 *	@param[in]  u8 *pEventData0 = useful data associated with the event.
 	 *
 	 * ---------------------------------------------------------------------------------------
 	 */
diff --git a/src/northbridge/amd/pi/agesawrapper_call.h b/src/northbridge/amd/pi/agesawrapper_call.h
index 15b90986c2..1ed4a4c796 100644
--- a/src/northbridge/amd/pi/agesawrapper_call.h
+++ b/src/northbridge/amd/pi/agesawrapper_call.h
@@ -32,7 +32,7 @@
  */
 static const char * decodeAGESA_STATUS(AGESA_STATUS sret)
 {
-	const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
+	const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
 					"AGESA_BOUNDS_CHK", "AGESA_ALERT",
 					"AGESA_WARNING", "AGESA_ERROR",
 					"AGESA_CRITICAL", "AGESA_FATAL"
diff --git a/src/northbridge/intel/fsp_sandybridge/raminit.c b/src/northbridge/intel/fsp_sandybridge/raminit.c
index 7cc61aeebe..f67d405224 100644
--- a/src/northbridge/intel/fsp_sandybridge/raminit.c
+++ b/src/northbridge/intel/fsp_sandybridge/raminit.c
@@ -21,7 +21,7 @@
 #include "raminit.h"
 #include "northbridge.h"
 
-static const char* ecc_decoder[] = {
+static const char *ecc_decoder[] = {
 	"inactive",
 	"active on IO",
 	"disabled on IO",
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index e5e2b93cab..55a7339d4e 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -62,7 +62,7 @@ static void prepare_mrc_cache(struct pei_data *pei_data)
 	       __func__, pei_data->mrc_input, pei_data->mrc_input_len);
 }
 
-static const char* ecc_decoder[] = {
+static const char *ecc_decoder[] = {
 	"inactive",
 	"active on IO",
 	"disabled on IO",
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 61f761e117..691452ca43 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -130,7 +130,7 @@ static void prepare_mrc_cache(struct pei_data *pei_data)
 	       __func__, pei_data->mrc_input, pei_data->mrc_input_len);
 }
 
-static const char* ecc_decoder[] = {
+static const char *ecc_decoder[] = {
 	"inactive",
 	"active on IO",
 	"disabled on IO",
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 0e0395a536..580c4eb80b 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -366,7 +366,7 @@ struct soc_gpio_config {
 /* Description of GPIO 'bank' ex. {ncore, score. ssus} */
 struct gpio_bank {
 	const int gpio_count;
-	const u8* gpio_to_pad;
+	const u8 *gpio_to_pad;
 	const int legacy_base;
 	const unsigned long pad_base;
 	const u8 has_wake_en :1;
diff --git a/src/soc/intel/fsp_baytrail/include/soc/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
index 02c226b1d7..7c81151b51 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/gpio.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
@@ -342,7 +342,7 @@ struct soc_gpio_config {
 /* Description of GPIO 'bank' ex. {ncore, score. ssus} */
 struct gpio_bank {
 	const int gpio_count;
-	const u8* gpio_to_pad;
+	const u8 *gpio_to_pad;
 	const int legacy_base;
 	const unsigned long pad_base;
 	const u8 has_wake_en :1;
diff --git a/src/soc/nvidia/tegra210/clock.c b/src/soc/nvidia/tegra210/clock.c
index 277ba27050..51cfc8b2c8 100644
--- a/src/soc/nvidia/tegra210/clock.c
+++ b/src/soc/nvidia/tegra210/clock.c
@@ -646,7 +646,7 @@ void clock_init(void)
 	graphics_pll();
 }
 
-void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg,
+void clock_grp_enable_clear_reset(u32 val, u32 *clk_enb_set_reg,
 				  u32 *rst_dev_clr_reg)
 {
 	write32(clk_enb_set_reg, val);
diff --git a/src/soc/nvidia/tegra210/include/soc/clock.h b/src/soc/nvidia/tegra210/include/soc/clock.h
index f3a63c8e5e..50d72603ee 100644
--- a/src/soc/nvidia/tegra210/include/soc/clock.h
+++ b/src/soc/nvidia/tegra210/include/soc/clock.h
@@ -433,7 +433,8 @@ void clock_disable_regs(u32 bits[DEV_CONFIG_BLOCKS]);
 void clock_set_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);
 void clock_clr_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);
 void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x, u32 y);
-void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg, u32* rst_dev_clr_reg);
+void clock_grp_enable_clear_reset(u32 val, u32 *clk_enb_set_reg,
+				  u32 *rst_dev_clr_reg);
 void clock_reset_l(u32 l);
 void clock_reset_h(u32 h);
 void clock_reset_u(u32 u);
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 436854e234..6211ddeec2 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -48,7 +48,7 @@ enum power_mode {
 #define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL POWER_MODE_ON
 #endif
 
-static const char* power_mode_names[] = {
+static const char *power_mode_names[] = {
 	[POWER_MODE_OFF] = "off",
 	[POWER_MODE_ON] = "on",
 	[POWER_MODE_LAST] = "last",
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 54a16ce622..0334af3e80 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -830,7 +830,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data)
 	memset(mbp_data, 0, sizeof(*mbp_data));
 
 	while (mbp_hdr.num_entries--) {
-		u32* copy_addr;
+		u32 *copy_addr;
 		u32 copy_size, buffer_room;
 		void *p;
 
diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
index 03a9d458ca..fb68d6d44c 100644
--- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
@@ -827,7 +827,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data)
 	memset(mbp_data, 0, sizeof(*mbp_data));
 
 	while (mbp_hdr.num_entries--) {
-		u32* copy_addr;
+		u32 *copy_addr;
 		u32 copy_size, buffer_room;
 		void *p;
 
diff --git a/src/southbridge/intel/fsp_i89xx/me_8.x.c b/src/southbridge/intel/fsp_i89xx/me_8.x.c
index aec6cd68ec..b2f30768d5 100644
--- a/src/southbridge/intel/fsp_i89xx/me_8.x.c
+++ b/src/southbridge/intel/fsp_i89xx/me_8.x.c
@@ -782,7 +782,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data)
 	memset(mbp_data, 0, sizeof(*mbp_data));
 
 	while (mbp_hdr.num_entries--) {
-		u32* copy_addr;
+		u32 *copy_addr;
 		u32 copy_size, buffer_room;
 		void *p;