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authorSubrata Banik <subrata.banik@intel.com>2019-05-15 20:08:55 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-16 04:35:00 +0000
commit48b6be81a5753779f036818a62dd9d61c6abc9c0 (patch)
tree662dad372019c64dc040ddde5f8d55004d27787a
parentdce10f8f92c4e771cf54544679fcbe10f094afdf (diff)
downloadcoreboot-48b6be81a5753779f036818a62dd9d61c6abc9c0.tar.xz
Remove remaining unnecessary ENV_RAMSTAGE guard
TEST=Able to build coreboot for CML. Change-Id: I8a6a97d59277ebfc498c83bb039436ed7c89d2cd Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com>
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/info_header.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
index e0659243ba..3e86b29c8d 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
@@ -44,7 +44,6 @@ struct fsp_header {
enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
-#if ENV_RAMSTAGE
/*
* This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains
* both SiliconInit and Notify APIs. When SiliconInit is loaded the
@@ -52,6 +51,5 @@ enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
* header parsing again.
*/
extern struct fsp_header fsps_hdr;
-#endif
#endif /* _FSP2_0_INFO_HEADER_H_ */