soc/intel/skylake: Enable SDXC depending on devicetree configuration

Currently, SDXC gets enabled by the option ScsSdCardEnabled,
but this duplicates the devicetree on/off options. Therefore, depend on
the devicetree for the enablement of the SDXC controller.

All corresponding mainboards were checked if the devicetree
configuration matches the ScsSdCardEnabled setting, and missing
entries were added.

Change-Id: I298b7d0b0fe2a7346dbadcea4be22dc67fce4de8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner

28 files changed, 10 insertions, 34 deletions

diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb
index d6ad862c11..b3d9929e2b 100644
--- a/src/mainboard/51nb/x210/devicetree.cb
+++ b/src/mainboard/51nb/x210/devicetree.cb
@@ -51,7 +51,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "1"
@@ -144,6 +143,7 @@ chip soc/intel/skylake
 		device pci 1d.1 off end # PCI Express Port 10
 		device pci 1d.2 off end # PCI Express Port 11
 		device pci 1d.3 off end # PCI Express Port 12
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on
 			chip ec/51nb/npce985la0dx
 				device pnp 0c09.0 on end
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index 6de2a63db1..d6f29a20e9 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -265,9 +265,7 @@ chip soc/intel/skylake
 		device pci 1e.3 off end # GSPI #1
 		device pci 1e.4 off end # eMMC
 		device pci 1e.5 off end # SDIO
-		device pci 1e.6 off     # SDCard
-			register "ScsSdCardEnabled" = "0"
-		end
+		device pci 1e.6 off end # SDCard
 		device pci 1f.0 on      # LPC bridge
 			subsystemid 0x1849 0x1a43
 
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index 8a459f71bc..8d15e8e50d 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -44,7 +44,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
index 651f174a27..e8412d5ce0 100644
--- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
@@ -75,7 +75,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "2"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index f2d7c64d0c..108470bf92 100644
--- a/src/mainboard/google/glados/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -46,7 +46,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/glados/variants/caroline/overridetree.cb b/src/mainboard/google/glados/variants/caroline/overridetree.cb
index 7bee2e2a48..b1f3e8bb52 100644
--- a/src/mainboard/google/glados/variants/caroline/overridetree.cb
+++ b/src/mainboard/google/glados/variants/caroline/overridetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/skylake
 
-	register "ScsSdCardEnabled" = "2"
-
 	register "PmConfigSlpS4MinAssert" = "1"		# 1s
 	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
 
diff --git a/src/mainboard/google/glados/variants/cave/overridetree.cb b/src/mainboard/google/glados/variants/cave/overridetree.cb
index 9aeb78afa7..7753dd4fb2 100644
--- a/src/mainboard/google/glados/variants/cave/overridetree.cb
+++ b/src/mainboard/google/glados/variants/cave/overridetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/skylake
 
-	register "ScsSdCardEnabled" = "2"
-
 	register "PmConfigSlpS4MinAssert" = "1"		# 1s
 	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
 
diff --git a/src/mainboard/google/glados/variants/glados/overridetree.cb b/src/mainboard/google/glados/variants/glados/overridetree.cb
index c510e920a0..3a0fdd4418 100644
--- a/src/mainboard/google/glados/variants/glados/overridetree.cb
+++ b/src/mainboard/google/glados/variants/glados/overridetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/skylake
 
-	register "ScsSdCardEnabled" = "2"
-
 	register "PmConfigSlpS4MinAssert" = "1"		# 1s
 	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
 
diff --git a/src/mainboard/google/glados/variants/sentry/overridetree.cb b/src/mainboard/google/glados/variants/sentry/overridetree.cb
index 08d3dd3aba..36575f8856 100644
--- a/src/mainboard/google/glados/variants/sentry/overridetree.cb
+++ b/src/mainboard/google/glados/variants/sentry/overridetree.cb
@@ -1,7 +1,5 @@
 chip soc/intel/skylake
 
-	register "ScsSdCardEnabled" = "2"
-
 	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
 	register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# Type-C Port 2
 	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index eae98356cb..73f8281d64 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -51,7 +51,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index ea6267f699..8c638bad0c 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -41,7 +41,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 98568f8d8d..851e240ddb 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "0"
 	register "SaImguEnable" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 43d6509ebb..e4f31123b5 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -41,7 +41,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 2bd82a9cfe..c7540e95ac 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -46,7 +46,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
index ef5cd1b008..0c221af2d2 100644
--- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
@@ -51,7 +51,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "0"
 	register "SaImguEnable" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index e5307c22cd..af501561af 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -41,7 +41,6 @@ chip soc/intel/skylake
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
index 318986e759..8de089de90 100644
--- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
@@ -26,7 +26,6 @@ chip soc/intel/skylake
 	register "HeciEnabled" = "0"
 	register "IoBufferOwnership" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "SkipExtGfxScan" = "1"
 	register "SaGv" = "SaGv_Enabled"
 	register "PchHdaVcType" = "Vc1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index ae372ec88d..fbf08cde3f 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -3,7 +3,6 @@ chip soc/intel/skylake
 	# FSP Configuration
 	register "DspEnable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "PmTimerDisabled" = "0"
 
 	register "serirq_mode" = "SERIRQ_CONTINUOUS"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
index 25dc49ea51..78552fcdd5 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
@@ -6,7 +6,6 @@ chip soc/intel/skylake
 
 	# FSP Configuration
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "PmTimerDisabled" = "0"
 
 	register "serirq_mode" = "SERIRQ_CONTINUOUS"
@@ -171,6 +170,7 @@ chip soc/intel/skylake
 		device pci 1e.2 on  end # GSPI #0
 		device pci 1e.3 on  end # GSPI #1
 		device pci 1e.4 off end # eMMC
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on
 			#chip drivers/pc80/tpm
 			#	device pnp 0c31.0 on end
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index ae637ca53b..2b7a0e3482 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -27,7 +27,6 @@ chip soc/intel/skylake
 	register "DspEnable" = "1"
 	register "IoBufferOwnership" = "3"
 	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
 	register "SaGv" = "SaGv_Enabled"
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb
index 87d3fc0f94..a25cb8c579 100644
--- a/src/mainboard/intel/saddlebrook/devicetree.cb
+++ b/src/mainboard/intel/saddlebrook/devicetree.cb
@@ -21,7 +21,6 @@ chip soc/intel/skylake
 	register "DspEnable" = "1"
 	register "IoBufferOwnership" = "3"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "SkipExtGfxScan" = "1"
 
 	register "SaGv" = "SaGv_Enabled"
diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb
index a355ee4169..91552a26b8 100644
--- a/src/mainboard/libretrend/lt1000/devicetree.cb
+++ b/src/mainboard/libretrend/lt1000/devicetree.cb
@@ -52,7 +52,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "1"
 	register "SaGv" = "SaGv_Enabled"
@@ -201,6 +200,7 @@ chip soc/intel/skylake
 		device pci 1d.1 on  end # PCI Express Port 10
 		device pci 1d.2 on  end # PCI Express Port 11
 		device pci 1d.3 on  end # PCI Express Port 12
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on
 			chip drivers/pc80/tpm
 				device pnp 0c31.0 on end
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index 16400111ac..63861c616f 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -41,7 +41,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "1"
 	register "PmTimerDisabled" = "1"
diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
index 18e02e7029..60f69c8110 100644
--- a/src/mainboard/purism/librem_skl/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/devicetree.cb
@@ -57,7 +57,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "0"
@@ -192,6 +191,7 @@ chip soc/intel/skylake
 		device pci 1d.1 off end # PCI Express Port 10
 		device pci 1d.2 off end # PCI Express Port 11
 		device pci 1d.3 off end # PCI Express Port 12
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on
 			chip drivers/pc80/tpm
 				device pnp 0c31.0 on end
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index 4306da6b36..6217de5097 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -37,7 +37,6 @@ chip soc/intel/skylake
 	register "SsicPortEnable" = "0"
 	register "Cio2Enable" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "PttSwitch" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "HeciEnabled" = "1"
@@ -228,6 +227,7 @@ chip soc/intel/skylake
 		device pci 1d.2 off end # PCI Express Port 11
 		device pci 1d.3 off end # PCI Express Port 12
 		device pci 1e.0 on  end # Serial IO UART0
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on # LPC
 			chip drivers/pc80/tpm
 				device pnp 0c31.0 on end
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
index 435015b93f..bbc52db5e7 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
@@ -8,7 +8,6 @@ chip soc/intel/skylake
 
 	# FSP Configuration
 	register "ScsEmmcHs400Enabled" = "0"
-	register "ScsSdCardEnabled" = "0"
 	register "SkipExtGfxScan" = "1"
 	register "SaGv" = "SaGv_Disabled"
 
@@ -140,6 +139,7 @@ chip soc/intel/skylake
 		device pci 1e.0 off end	# UART #0
 		device pci 1e.1 off end	# UART #1
 		device pci 1e.2 off end	# SPI #0
+		device pci 1e.6 off end # SDXC
 		device pci 1f.0 on	# LPC Interface
 			chip superio/common
 				device pnp 2e.0 on  end
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 6423cf4120..cb0d2fc4ac 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -257,7 +257,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	dev = pcidev_path_on_root(PCH_DEVFN_EMMC);
 	params->ScsEmmcEnabled = dev ? dev->enabled : 0;
 	params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
-	params->ScsSdCardEnabled = config->ScsSdCardEnabled;
+
+	dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
+	params->ScsSdCardEnabled = dev && dev->enabled;
 
 	if (!!params->ScsEmmcHs400Enabled && !!config->EmmcHs400DllNeed) {
 		params->PchScsEmmcHs400DllDataValid =
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index e332a6bb8e..404a9f417e 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -306,7 +306,6 @@ struct soc_intel_skylake_config {
 
 	/* eMMC and SD */
 	u8 ScsEmmcHs400Enabled;
-	u8 ScsSdCardEnabled;
 	u8 EmmcHs400DllNeed;
 	u8 ScsEmmcHs400RxStrobeDll1;
 	u8 ScsEmmcHs400TxDataDll;