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authorDavid Hendricks <dhendrix@chromium.org>2013-03-29 13:40:09 -0700
committerDavid Hendricks <dhendrix@chromium.org>2013-03-29 22:40:08 +0100
commit58779358362ef0c9ed433c310416a93c8b9c9211 (patch)
treeafaf81e98b850354ef1ababf4064c00041e0d08f
parent26e8f2fe0125cc6e7727d024bf4bfbd6231c8b27 (diff)
downloadcoreboot-58779358362ef0c9ed433c310416a93c8b9c9211.tar.xz
armv7: remove loop from dcache_mmu_disable()
dcache_mmu_disable() no longer needs to have its own iterative loop to select each cache level of cache since dcache_clean_invalidate_all() does that now. Change-Id: I5ca273f98943981b943c1c1622f4574d7133fb50 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2967 Reviewed-by: Gabe Black <gabe.black@gmail.com> Tested-by: build bot (Jenkins)
-rw-r--r--src/arch/armv7/lib/cache.c32
1 files changed, 2 insertions, 30 deletions
diff --git a/src/arch/armv7/lib/cache.c b/src/arch/armv7/lib/cache.c
index c7283f14cf..04eaa88c7c 100644
--- a/src/arch/armv7/lib/cache.c
+++ b/src/arch/armv7/lib/cache.c
@@ -237,37 +237,9 @@ void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len)
void dcache_mmu_disable(void)
{
- uint32_t sctlr, clidr;
- int level;
-
- clidr = read_clidr();
- for (level = 0; level < 7; level++) {
- unsigned int ctype = (clidr >> (level * 3)) & 0x7;
- uint32_t csselr;
-
- switch(ctype) {
- case 0x0:
- /* no cache */
- break;
- case 0x2:
- case 0x4:
- /* dcache only or unified cache */
- csselr = level << 1;
- write_csselr(csselr);
- dcache_clean_invalidate_all();
- break;
- case 0x3:
- /* separate icache and dcache */
- csselr = level << 1;
- write_csselr(csselr);
- dcache_clean_invalidate_all();
- break;
- default:
- /* reserved */
- break;
- }
- }
+ uint32_t sctlr;
+ dcache_clean_invalidate_all();
sctlr = read_sctlr();
sctlr &= ~(SCTLR_C | SCTLR_M);
write_sctlr(sctlr);