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| author | Aaron Durbin <adurbin@chromium.org> | 2013-04-03 09:57:53 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-04-05 21:57:38 +0200 |
| commit | 6ccb1abfd4aff94711b9950f75b0eb6758c4f4d1 (patch) | |
| tree | 905bed897c8be4d401d7b0a3ae43ccbd39c656fa | |
| parent | 0dc775e894a3a7b3539eeeb4210bf8b796062274 (diff) | |
| download | coreboot-6ccb1abfd4aff94711b9950f75b0eb6758c4f4d1.tar.xz | |
mtrr: add rom caching comment about hyperthreads
Explicitly call out the effects of hyperthreads running the
MTRR code and its impact on the enablement of ROM caching.
Change-Id: I14b8f3fdc112340b8f483f2e554c5680576a8a7c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3018
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 15a5cad090..38c3f7cd0a 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -74,7 +74,11 @@ int x86_mtrr_check(void); /* ROM caching can be used after variable MTRRs are set up. Beware that * enabling CONFIG_CACHE_ROM will eat through quite a few MTRRs based on * one's IO hole size and WRCOMB resources. Be sure to check the console - * log when enabling CONFIG_CACHE_ROM or adding WRCOMB resources. */ + * log when enabling CONFIG_CACHE_ROM or adding WRCOMB resources. Beware that + * on CPUs with core-scoped MTRR registers such as hyperthreaded CPUs the + * rom caching will be disabled if all threads run the MTRR code. Therefore, + * one needs to call x86_mtrr_enable_rom_caching() after all threads of the + * same core have run the MTRR code. */ #if CONFIG_CACHE_ROM void x86_mtrr_enable_rom_caching(void); void x86_mtrr_disable_rom_caching(void); |