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authorAndrey Petrov <anpetrov@fb.com>2020-03-19 15:11:59 -0700
committerAndrey Petrov <anpetrov@fb.com>2020-03-26 18:14:16 +0000
commit7b42bba3cf287e13eff6b86326f55ef6bf6ff6e0 (patch)
tree0c8f41198269fafcfd89e3b12206a19822f7ea90
parent2e410757efb824555191d8afd78cf79ab5ba6049 (diff)
downloadcoreboot-7b42bba3cf287e13eff6b86326f55ef6bf6ff6e0.tar.xz
vendorcode: Add fake Cooperlake-SP FSP header files
These header files are just placeholders. Currently FSP does not look into any real platform-specific UPD fields anyway, so having padding instead of real thing makes no difference. Signed-off-by: Andrey Petrov <anpetrov@fb.com> Change-Id: Id123f4386124b2ceb7776ab719a9970c9c23a0e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39711 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspEas.h24
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspUpd.h18
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h22
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspsUpd.h20
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h31
5 files changed, 115 insertions, 0 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspEas.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspEas.h
new file mode 100644
index 0000000000..21b84a3069
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspEas.h
@@ -0,0 +1,24 @@
+/** @file
+ Intel FSP definition from Intel Firmware Support Package External
+ Architecture Specification v2.0.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This file and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THIS FILE IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _FSP_EAS_H_
+#define _FSP_EAS_H_
+
+#include <Uefi.h>
+#include <Guid/GuidHobFspEas.h>
+#include <Guid/FspHeaderFile.h>
+#include <FspEas/FspApi.h>
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspUpd.h
new file mode 100644
index 0000000000..086c1181ef
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspUpd.h
@@ -0,0 +1,18 @@
+/*
+ * These are fake files which only contain padding and some known
+ * data structures from FSP2.x spec.
+ */
+
+#ifndef __FSPUPD_H__
+#define __FSPUPD_H__
+
+#include <stdint.h>
+#include <FspEas.h>
+
+#define FSP_M_CONFIG FSPM_CONFIG
+
+#define FSPT_UPD_SIGNATURE 0x545F445055434F53ULL /* 'SOCUPD_T' */
+#define FSPM_UPD_SIGNATURE 0x4D5F445055434F53ULL /* 'SOCUPD_M' */
+#define FSPS_UPD_SIGNATURE 0x535F445055434F53ULL /* 'SOCUPD_S' */
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h
new file mode 100644
index 0000000000..bdd80ece7d
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h
@@ -0,0 +1,22 @@
+#ifndef __FSPMUPD_H__
+#define __FSPMUPD_H__
+
+#include <FspEas.h>
+#include <FspUpd.h>
+
+#pragma pack (1)
+
+typedef struct {
+uint8_t padding[208];
+} FSPM_CONFIG;
+
+typedef struct {
+ FSP_UPD_HEADER FspUpdHeader;
+ FSPM_ARCH_UPD FspmArchUpd;
+ FSPM_CONFIG FspmConfig;
+ uint16_t UpdTerminator;
+} FSPM_UPD;
+
+#pragma pack(1)
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspsUpd.h
new file mode 100644
index 0000000000..646c1e2fe6
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspsUpd.h
@@ -0,0 +1,20 @@
+#ifndef __FSPSUPD_H__
+#define __FSPSUPD_H__
+
+#pragma pack(1)
+
+#include <FspUpd.h>
+
+typedef struct {
+ uint8_t padding[54];
+} FSPS_CONFIG;
+
+typedef struct {
+ FSP_UPD_HEADER FspUpdHeader;
+ FSPS_CONFIG FspsConfig;
+ uint16_t UpdTerminator;
+} FSPS_UPD;
+
+#pragma pack(1)
+
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h
new file mode 100644
index 0000000000..a792e703f3
--- /dev/null
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h
@@ -0,0 +1,31 @@
+#ifndef __FSPTUPD_H__
+#define __FSPTUPD_H__
+
+#include <FspUpd.h>
+
+#pragma pack(1)
+
+typedef struct {
+ uint32_t MicrocodeRegionBase;
+ uint32_t MicrocodeRegionLength;
+ uint32_t CodeRegionBase;
+ uint32_t CodeRegionLength;
+ uint8_t Reserved1[16];
+} FSPT_CORE_UPD;
+
+typedef struct {
+ uint8_t PcdFsptPort80RouteDisable;
+ uint8_t ReservedTempRamInitUpd[31];
+} FSPT_CONFIG;
+
+typedef struct {
+ FSP_UPD_HEADER FspUpdHeader;
+ FSPT_CORE_UPD FsptCoreUpd;
+ FSPT_CONFIG FsptConfig;
+ uint8_t UnusedUpdSpace0[6];
+ uint16_t UpdTerminator;
+} FSPT_UPD;
+
+#pragma pack()
+
+#endif