summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-07-24 16:15:04 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-30 22:50:12 +0000
commit879c4de66f1800b3819e80d94f445f91ddfb6757 (patch)
tree7c1443ab09e671c4605dfc1edc0e652f44a6e814
parent4ea1d166a503dc5186b2d8b18203c99aa7eee62d (diff)
downloadcoreboot-879c4de66f1800b3819e80d94f445f91ddfb6757.tar.xz
nb/intel/x4x/rcven.c: Rename memory barrier function
Use the name of the assembly instruction it uses, mfence. Change-Id: I98d7926434694a41fb6415bed4276741fa7996af Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/northbridge/intel/x4x/rcven.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c
index 332d89c526..506282bc38 100644
--- a/src/northbridge/intel/x4x/rcven.c
+++ b/src/northbridge/intel/x4x/rcven.c
@@ -19,7 +19,7 @@ struct rec_timing {
u8 tap;
};
-static inline void barrier(void)
+static inline void mfence(void)
{
asm volatile("mfence":::);
}
@@ -33,10 +33,10 @@ static u8 sampledqs(u32 addr, u8 lane, u8 channel)
udelay(2);
MCHBAR8(RESET_CNTL(channel)) |= 0x2;
udelay(2);
- barrier();
+ mfence();
/* Read strobe */
read32((u32 *)addr);
- barrier();
+ mfence();
return (MCHBAR8(sample_offset) >> 6) & 1;
}