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| author | John Zhao <john.zhao@intel.com> | 2020-04-22 09:43:58 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2020-04-29 17:19:09 +0000 |
| commit | 8939d28f16fc57b109a3172bfd277c411be1ebfd (patch) | |
| tree | eb98251b3bde785f812ca8fb16238ba12291156c | |
| parent | c2af6097c26ad002dfbba6f079c0ec449f87afd7 (diff) | |
| download | coreboot-8939d28f16fc57b109a3172bfd277c411be1ebfd.tar.xz | |
mb/google/volteer: Include TCSS power management
Include TCSS RTD3 into ACPI DSDT table.
BUG=b:140290596
TEST=Booted to kernel and verified tcss xhci/pcierp/dma
power state D3 entry/exit.
Change-Id: Iae31a29eb23f7370737d097dd401f4056b8b7052
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
| -rw-r--r-- | src/mainboard/google/volteer/dsdt.asl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl index 450835db03..e2dcaef3f1 100644 --- a/src/mainboard/google/volteer/dsdt.asl +++ b/src/mainboard/google/volteer/dsdt.asl @@ -31,6 +31,7 @@ DefinitionBlock( { #include <soc/intel/common/block/acpi/acpi/northbridge.asl> #include <soc/intel/tigerlake/acpi/southbridge.asl> + #include <soc/intel/tigerlake/acpi/tcss.asl> } /* Mainboard hooks */ #include "mainboard.asl" |