diff options
| author | David Hendricks <dhendrix@chromium.org> | 2013-02-08 18:04:59 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-09 05:03:29 +0100 |
| commit | 896edc28af423cedbb6eab6d0a83c090e3fb2ef5 (patch) | |
| tree | a652844d8981c75ddfe29c6357e67d9bf47f1dc0 | |
| parent | b73d904cff574bb8447c75457a07353a81100ad5 (diff) | |
| download | coreboot-896edc28af423cedbb6eab6d0a83c090e3fb2ef5.tar.xz | |
snow: do something useful in ramstage()
This cleans up Snow's trivial ramstage, gives it a coreboot table
address and calls hardwaremain().
Change-Id: I84c904bcfd57a5f9eb3969de8a496f01e43bc2f6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2328
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/mainboard/google/snow/ramstage.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index f9d9c9600c..d280dbe050 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -19,12 +19,21 @@ #include <console/console.h> +#if CONFIG_WRITE_HIGH_TABLES +#include <cbmem.h> +#endif + +void hardwaremain(int boot_complete); void main(void) { -// volatile unsigned long *pshold = (unsigned long *)0x1004330c; -// *pshold &= ~0x100; /* shut down */ - console_init(); printk(BIOS_INFO, "hello from ramstage\n"); - while (1); + +#if CONFIG_WRITE_HIGH_TABLES + /* Leave some space for ACPI tables */ + high_tables_base = CONFIG_RAMBASE; + high_tables_size = CONFIG_RAMBASE + 0x100000; +#endif + + hardwaremain(0); } |