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authorEugene Myers <edmyers@tycho.nsa.gov>2020-02-10 15:02:27 -0500
committerPatrick Georgi <pgeorgi@google.com>2020-02-17 15:34:06 +0000
commit970ed2ad293c6928a0ebaa41c6229112c7531983 (patch)
tree91b60e78c92d2ba877370e8c7f79eb4a47cf7cf7
parent2ae9d698882dd0ce899a0008d5d0526373af407a (diff)
downloadcoreboot-970ed2ad293c6928a0ebaa41c6229112c7531983.tar.xz
cpu/x86: Adjust STM smm_save_state_size
Initial testing of STM support revealed a sizing issue for greater than 4 threads. This patch reduces the STM smm_save_state_size, which should allow for 24 threads. Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov> Change-Id: I025694185469577e072a92ea75cbbb53c24b2c24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38819 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/cpu/x86/mp_init.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index c747207f7c..5169861676 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -1046,19 +1046,7 @@ static void fill_mp_state(struct mp_state *state, const struct mp_ops *ops)
*/
if (CONFIG(STM)) {
state->smm_save_state_size +=
- sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
-
- /* Currently, the CPU SMM save state size is based on a simplistic
- * algorithm. (align on 4K)
- * note: In the future, this will need to handle newer x86 processors
- * that require alignment of the save state on 32K boundaries.
- * The alignment is done here because coreboot has a hard coded
- * value of 0x400 for this value.
- * Also, this alignment only works on CPUs less than 5 threads
- */
- if (CONFIG(STM))
- state->smm_save_state_size =
- ALIGN_UP(state->smm_save_state_size, 0x1000);
+ ALIGN_UP(sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR), 0x100);
}
/*