diff options
| author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-08-18 19:09:10 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:39:09 +0000 |
| commit | 9da0279e1a99babe81a064441b97f6a93dd518bf (patch) | |
| tree | 2da3b527b29f6c3861899cb9a5bfe2df714960ca | |
| parent | e4d27f6b4f88bb4b92fac79523cb54bb97562020 (diff) | |
| download | coreboot-9da0279e1a99babe81a064441b97f6a93dd518bf.tar.xz | |
mb/ocp/deltalake: Add SMBIOS OEM string for SPD register vendor ID
Tested=On OCP Delta Lake, with FSP WW36 dmidecode -t 11 can see the
SPD register vendor ID
String 7: b300 0000 b300 0000 b300 0000 b300 0000 b300 0000 b300 0000
Change-Id: I15ab9b4c709eb97a03d6e08fe0bcdcb7f8607db0
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/mainboard/ocp/deltalake/ramstage.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index 89d466b66c..e00f1c391e 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <bootstate.h> #include <drivers/ipmi/ipmi_ops.h> @@ -7,6 +8,7 @@ #include <gpio.h> #include <soc/lewisburg_pch_gpio_defs.h> #include <soc/ramstage.h> +#include <soc/soc_util.h> #include <stdio.h> #include <string.h> #include <smbios.h> @@ -14,6 +16,7 @@ #include <device/pci_ops.h> #include <soc/util.h> #include <hob_iiouds.h> +#include <hob_memmap.h> #include <cpxsp_dl_gpio.h> #include "ipmi.h" @@ -67,15 +70,37 @@ slot_info slotinfo[] = { {PSTACK2, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "Mezz Card(Class-2)"}, }; +#define SPD_REGVID_LEN 6 +/* A 4-digit long number plus a space */ +static void write_oem_word(uint16_t val, char *str) +{ + snprintf(str, SPD_REGVID_LEN, "%04x ", val); +} + static void dl_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) { uint8_t pcie_config = 0; + const struct SystemMemoryMapHob *hob; + char spd_reg_vid[SPD_REGVID_LEN]; + char empty[1] = ""; + char *oem_str7 = empty; /* OEM string 1 to 6 */ ocp_oem_smbios_strings(dev, t); - /* TODO: Add real OEM string 7, add TBF for now */ - t->count = smbios_add_oem_string(t->eos, TBF); + /* OEM string 7 is the register vendor ID in SPD for each DIMM strung together */ + hob = get_system_memory_map(); + assert(hob != NULL); + /* There are at most 6 channels and 2 DIMMs per channel, but Delta Lake has 6 DIMMs, + e.g. b300 0000 b300 0000 b300 0000 b300 0000 b300 0000 b300 0000 */ + for (int ch = 0; ch < MAX_CH; ch++) { + for (int dimm = 0; dimm < MAX_IMC; dimm++) { + write_oem_word(hob->Socket[0].ChannelInfo[ch].DimmInfo[dimm].SPDRegVen, + spd_reg_vid); + oem_str7 = strconcat(oem_str7, spd_reg_vid); + } + } + t->count = smbios_add_oem_string(t->eos, oem_str7); /* Add OEM string 8 */ if (ipmi_get_pcie_config(&pcie_config) == CB_SUCCESS) { |