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authorRonak Kanabar <ronak.kanabar@intel.com>2020-05-04 17:08:03 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-05 13:00:41 +0000
commita4412d68d50f27fea65ef4c83e43ab89aa27bf95 (patch)
treeea1553b3d4cf690e644214f795ff46a5f7ad0c90
parent296ce46bcc84a6c10716bb807f317ca9f451ed39 (diff)
downloadcoreboot-a4412d68d50f27fea65ef4c83e43ab89aa27bf95.tar.xz
soc/intel/jasperlake: Allow SD card power enable polarity configuration
SdCardPowerEnableActiveHigh is a UPD which controls polarity of SD card power enable pin. Setting it 1 will set polarity of this pin as Active high. This patch will allow to control it from devicetree so that it can be set as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD value from FSP log Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Change-Id: Id777a262651689952a217875e6606f67855fc2f4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41027 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/jasperlake/fsp_params.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index f525fd8af1..28dccabb10 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -136,10 +136,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* SDCard related configuration */
dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
- if (!dev)
+ if (!dev) {
params->ScsSdCardEnabled = 0;
- else
+ } else {
params->ScsSdCardEnabled = dev->enabled;
+ params->SdCardPowerEnableActiveHigh = config->SdCardPowerEnableActiveHigh;
+ }
params->Device4Enable = config->Device4Enable;