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authorVladimir Serbinenko <phcoder@gmail.com>2015-05-21 09:28:14 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2015-05-27 22:24:13 +0200
commita93c0143ac79f937f774b99e4afedee6a20eb5d3 (patch)
tree703fb897e5028cd2e7537152a8e927d20c7485ea
parent61273d46197b724598b6a579951a03321a2789c9 (diff)
downloadcoreboot-a93c0143ac79f937f774b99e4afedee6a20eb5d3.tar.xz
x201: Add TPM declaration.
This allows to deactivate TPM on X201. Change-Id: Ic085db6cc2c57668e7a4fdbc7440735c806cc256 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10278 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
-rw-r--r--src/mainboard/lenovo/x201/Kconfig1
-rw-r--r--src/mainboard/lenovo/x201/devicetree.cb3
-rw-r--r--src/mainboard/lenovo/x201/dsdt.asl8
-rw-r--r--src/mainboard/lenovo/x201/romstage.c5
4 files changed, 17 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
index 93bfb02601..7f96cbe820 100644
--- a/src/mainboard/lenovo/x201/Kconfig
+++ b/src/mainboard/lenovo/x201/Kconfig
@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select SUPERIO_NSC_PC87382
select DRIVERS_LENOVO_WACOM
+ select MAINBOARD_HAS_LPC_TPM
config MAINBOARD_DIR
string
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index d8929269ab..f87ab1069c 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -153,6 +153,9 @@ chip northbridge/intel/nehalem
# DLPC, not connected
device pnp 164e.19 off end
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
end
device pci 1f.2 on # IDE/SATA
subsystemid 0x17aa 0x2168
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index 20d647effa..dab66e4c0a 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -87,6 +87,14 @@ DefinitionBlock(
}
}
+/*
+ * LPC Trusted Platform Module
+ */
+Scope (\_SB.PCI0.LPCB)
+{
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+}
+
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 8d1289035f..1e335d33ec 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -37,6 +37,7 @@
#include <timestamp.h>
#include <arch/acpi.h>
#include <cbmem.h>
+#include <tpm.h>
#include "gpio.h"
#include "dock.h"
@@ -306,5 +307,9 @@ void main(unsigned long bist)
}
#endif
+#if CONFIG_LPC_TPM
+ init_tpm(s3resume);
+#endif
+
timestamp_add_now(TS_END_ROMSTAGE);
}