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authorCaveh Jalali <caveh@chromium.org>2020-08-28 19:54:45 -0700
committerNico Huber <nico.h@gmx.de>2020-09-04 19:13:31 +0000
commitb2280149c0c8b037da9f51ad27ff4ba84351e286 (patch)
tree6a19e819bd43539677d5b353f75dce8a292f4a67
parent00ff21f6daff036ae2e09869070ab2793d8dbd8b (diff)
downloadcoreboot-b2280149c0c8b037da9f51ad27ff4ba84351e286.tar.xz
libpayload/xhci: Fix Slot State field width definition
According to the xHCI spec, the Slot State field in the Slot Context Data Structure is 5 bits wide. So, fix the code to match. ref. xHCI spec 1.2 section 6.2.2, Figure 6-2: Slot Context Data Structure BUG=none TEST=xHCI compiles Change-Id: I0ae735af3d0840aeee846fa939c37af9aea3dff1 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45023 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--payloads/libpayload/drivers/usb/xhci_private.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/payloads/libpayload/drivers/usb/xhci_private.h b/payloads/libpayload/drivers/usb/xhci_private.h
index b4c8825dc6..137c88e0b9 100644
--- a/payloads/libpayload/drivers/usb/xhci_private.h
+++ b/payloads/libpayload/drivers/usb/xhci_private.h
@@ -204,7 +204,7 @@ typedef transfer_ring_t command_ring_t;
#define SC_UADDR_LEN 8
#define SC_STATE_FIELD f4 /* STATE - Slot State */
#define SC_STATE_START 27
-#define SC_STATE_LEN 8
+#define SC_STATE_LEN 5
#define SC_MASK(tok) MASK(SC_##tok##_START, SC_##tok##_LEN)
#define SC_GET(tok, sc) (((sc)->SC_##tok##_FIELD & SC_MASK(tok)) \
>> SC_##tok##_START)