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authorFrancois Toguo <francois.toguo.fotso@intel.com>2019-03-20 12:22:17 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-03-22 12:25:33 +0000
commitb7daf7e8fa18de7bfb3cd102791bc6af89bac4b6 (patch)
treeeab5ad2a46f6a0eed36adbd3b9563346372cf319
parentc912f76486ef802f013d71b4128ac895370033de (diff)
downloadcoreboot-b7daf7e8fa18de7bfb3cd102791bc6af89bac4b6.tar.xz
src/arch: An upgrade of SMBIOS to latest version 3.2
This is the second of 2 patches upgrading the SMBIOS interface to the latest 3.2 First patch is in mosys. Newer required fields are added to various types definitions BUG=NONE TEST=Boot to OS on GLK Sparky Change-Id: Iab98e063874c9738e48a387cd91341d266391156 Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
-rw-r--r--src/arch/x86/smbios.c43
-rw-r--r--src/include/smbios.h30
2 files changed, 72 insertions, 1 deletions
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 8cb59df6a3..b82780db11 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -328,6 +328,17 @@ static int create_smbios_type17_for_dimm(struct dimm_info *dimm,
t->handle = *handle;
*handle += 1;
t->length = sizeof(struct smbios_type17) - 2;
+ t->memory_technology = MEMORY_TECHNOLOGY_UNKNOWN;
+ t->operating_mode_capability = MEMORY_OPERATING_MODE_CAP_UNKNOWN;
+ t->fw_version = 0xff;
+ t->manufacturer_id = dimm->mod_id;
+ t->product_id = 0x0000;
+ t->sub_ctrl_manufacturer_id = 0x0000;
+ t->sub_ctrl_product_id = 0x0000;
+ t->non_volatile_size = 0xffffffffffffffff;
+ t->volatile_size = 0xffffffffffffffff;
+ t->cache_size = 0xffffffffffffffff;
+ t->logical_size = 0xffffffffffffffff;
return t->length + smbios_string_table_len(t->eos);
}
@@ -547,9 +558,31 @@ static int smbios_write_type3(unsigned long *current, int handle)
return len;
}
+u16 __weak smbios_processor_core_thread_count(u16 level_type)
+{
+ u16 count = 0;
+ int ecx = 0;
+
+ for (ecx = 0 ; ecx < 255 ; ecx++) {
+ struct cpuid_result leaf_b;
+ leaf_b = cpuid_ext(0xb, ecx);
+ if ((cpuid_eax(0) < 0xb) ||
+ !(leaf_b.eax | leaf_b.ebx | leaf_b.ecx | leaf_b.edx))
+ return (((cpuid(1).ebx) >> 16) & 0x00ff);
+
+ if ((leaf_b.ecx & 0xff00) == level_type) {
+ count = leaf_b.ebx & 0xffff;
+ break;
+ }
+ }
+
+ return count;
+}
+
static int smbios_write_type4(unsigned long *current, int handle)
{
struct cpuid_result res;
+ u16 core_count = 0, thread_count = 0;
struct smbios_type4 *t = (struct smbios_type4 *)*current;
int len = sizeof(struct smbios_type4);
@@ -570,7 +603,15 @@ static int smbios_write_type4(unsigned long *current, int handle)
t->processor_version = smbios_processor_name(t->eos);
t->processor_family = (res.eax > 0) ? 0x0c : 0x6;
t->processor_type = 3; /* System Processor */
- t->core_count = (res.ebx >> 16) & 0xff;
+
+ core_count = smbios_processor_core_thread_count(PROC_CORE_TYPE);
+ thread_count = smbios_processor_core_thread_count(PROC_THREAD_TYPE);
+ t->core_count2 = core_count;
+ t->core_count = (core_count > BYTE_LIMIT) ? 0xff : core_count;
+ t->thread_count2 = thread_count;
+ t->thread_count = (thread_count > BYTE_LIMIT) ? 0xff : core_count;
+ t->core_enabled2 = core_count;
+
t->l1_cache_handle = 0xffff;
t->l2_cache_handle = 0xffff;
t->l3_cache_handle = 0xffff;
diff --git a/src/include/smbios.h b/src/include/smbios.h
index af83bfe304..2f3bc7aa52 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -52,6 +52,10 @@ const char *smbios_mainboard_asset_tag(void);
u8 smbios_mainboard_feature_flags(void);
const char *smbios_mainboard_location_in_chassis(void);
u8 smbios_mainboard_enclosure_type(void);
+u16 smbios_processor_core_thread_count(u16 level_type);
+#ifdef CONFIG_MAINBOARD_FAMILY
+const char *smbios_mainboard_family(void);
+#endif
#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
#define BIOS_CHARACTERISTICS_PC_CARD (1 << 8)
@@ -100,6 +104,11 @@ u8 smbios_mainboard_enclosure_type(void);
#define MEMORY_OPERATING_MODE_CAP_BYTE_ACCESS_PERSISTENT (1 << 4)
#define MEMORY_OPERATING_MODE_CAP_BLOCK_ACCESS_PERSISTENT (1 << 5)
+#define PROC_THREAD_TYPE 0x1
+#define PROC_CORE_TYPE 0x2
+
+#define BYTE_LIMIT 255
+
typedef enum {
MEMORY_BUS_WIDTH_8 = 0,
MEMORY_BUS_WIDTH_16 = 1,
@@ -299,6 +308,8 @@ struct smbios_type2 {
u8 location_in_chassis;
u16 chassis_handle;
u8 board_type;
+ u8 num_cont_obj_handles;
+ u16 cont_obj_hanles[256];
u8 eos[2];
} __packed;
@@ -390,6 +401,9 @@ struct smbios_type4 {
u8 thread_count;
u16 processor_characteristics;
u16 processor_family2;
+ u16 core_count2;
+ u16 core_enabled2;
+ u16 thread_count2;
u8 eos[2];
} __packed;
@@ -401,6 +415,11 @@ struct smbios_type11 {
u8 eos[2];
} __packed;
+typedef struct {
+ u8 type;
+ u8 format_descriptor;
+} log_type_descriptor;
+
struct smbios_type15 {
u8 type;
u8 length;
@@ -471,6 +490,17 @@ struct smbios_type17 {
u16 minimum_voltage;
u16 maximum_voltage;
u16 configured_voltage;
+ u8 memory_technology;
+ u16 operating_mode_capability;
+ u8 fw_version;
+ u16 manufacturer_id;
+ u16 product_id;
+ u16 sub_ctrl_manufacturer_id;
+ u16 sub_ctrl_product_id;
+ u64 non_volatile_size;
+ u64 volatile_size;
+ u64 cache_size;
+ u64 logical_size;
u8 eos[2];
} __packed;