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authorJimmy Zhang <jimmzhang@nvidia.com>2014-10-09 18:42:00 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-21 13:40:09 +0100
commitbe1b4f171ec00dd636733b853f48ba537ac2fbc5 (patch)
tree92a0c9a4055d96efee567630153f0cf70a378d52
parent8a01eb60522bae5b6c30889b38ef1f84ff78131d (diff)
downloadcoreboot-be1b4f171ec00dd636733b853f48ba537ac2fbc5.tar.xz
libpayload arm64: Allocate framebuffer range
Allocate noncacheable memory for frame buffer and save base address to sys_libinfo. BRANCH=none BUG=chrome-os-partner:31936 TEST=build and test on ryu Change-Id: I19a8079616376dc7c1a8ecdbd7499c2553b8c6c3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cebb5650167264902548339bb1a2b428f3b7f4ed Original-Change-Id: I7bfbfefb92001632ce3d572a50e46188795c4ab8 Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226404 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8796 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--payloads/libpayload/arch/arm64/mmu.c49
-rw-r--r--payloads/libpayload/include/arm64/arch/mmu.h2
2 files changed, 51 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c
index b69dac26d0..41fb10b54d 100644
--- a/payloads/libpayload/arch/arm64/mmu.c
+++ b/payloads/libpayload/arch/arm64/mmu.c
@@ -616,6 +616,25 @@ static struct mmu_memrange *mmu_add_dma_range(struct mmu_ranges *mmu_ranges)
return mmu_alloc_range(mmu_ranges, &prop);
}
+static struct mmu_memrange *_mmu_add_fb_range(
+ uint32_t size,
+ struct mmu_ranges *mmu_ranges)
+{
+ struct mmu_new_range_prop prop;
+
+ prop.type = TYPE_DMA_MEM;
+
+ /* make sure to allocate a size of multiple of GRANULE_SIZE */
+ size = ALIGN_UP(size, GRANULE_SIZE);
+ prop.size = size;
+ prop.lim_excl = MIN_64_BIT_ADDR;
+ prop.align = MB_SIZE;
+ prop.is_valid_range = NULL;
+ prop.src_type = TYPE_NORMAL_MEM;
+
+ return mmu_alloc_range(mmu_ranges, &prop);
+}
+
/*
* Func: mmu_extract_ranges
* Desc: Assumption is that coreboot tables have memranges in sorted
@@ -653,6 +672,33 @@ static void mmu_extract_ranges(struct memrange *cb_ranges,
}
}
+static void mmu_add_fb_range(struct mmu_ranges *mmu_ranges)
+{
+ struct mmu_memrange *fb_range;
+ struct cb_framebuffer *framebuffer = lib_sysinfo.framebuffer;
+ uint32_t fb_size;
+
+ /*
+ * Check whether framebuffer is needed
+ * or framebuffer address has been set already
+ */
+ if (framebuffer == NULL)
+ return;
+ if (framebuffer->physical_address)
+ return;
+ fb_size = framebuffer->bytes_per_line * framebuffer->y_resolution;
+ if (!fb_size)
+ return;
+
+ /* Allocate framebuffer */
+ fb_range = _mmu_add_fb_range(fb_size, mmu_ranges);
+ if (fb_range == NULL)
+ mmu_error();
+
+ /* Set framebuffer address */
+ framebuffer->physical_address = fb_range->base;
+}
+
/*
* Func: mmu_init_ranges
* Desc: Initialize mmu_memranges based on the memranges obtained from coreboot
@@ -673,6 +719,9 @@ struct mmu_memrange *mmu_init_ranges_from_sysinfo(struct memrange *cb_ranges,
/* Get a range for dma */
dma_range = mmu_add_dma_range(mmu_ranges);
+ /* Get a range for framebuffer */
+ mmu_add_fb_range(mmu_ranges);
+
if (dma_range == NULL)
mmu_error();
diff --git a/payloads/libpayload/include/arm64/arch/mmu.h b/payloads/libpayload/include/arm64/arch/mmu.h
index fdb1cc86d1..abd29f5ad4 100644
--- a/payloads/libpayload/include/arm64/arch/mmu.h
+++ b/payloads/libpayload/include/arm64/arch/mmu.h
@@ -181,6 +181,8 @@ extern char _start[], _end[];
#define DMA_DEFAULT_SIZE (0x20 * GRANULE_SIZE)
#define TTB_DEFAULT_SIZE 0x100000
+#define MB_SIZE (1UL << 20)
+
/* Initialize the MMU TTB tables using the mmu_ranges */
uint64_t mmu_init(struct mmu_ranges *mmu_ranges);