summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2019-08-30 22:14:18 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-09-02 20:07:40 +0000
commitc54dcf499b62ae48c5b8322f3ea9714ebd4d1108 (patch)
tree6901a2daef16a617ba3b2cfa5ed4f341cbc27e6f
parent3647920722a1c6abc06be4d802efe835f0a7775e (diff)
downloadcoreboot-c54dcf499b62ae48c5b8322f3ea9714ebd4d1108.tar.xz
soc/skylake: prevent null pointer dereferences
Change-Id: Ide10223e7fc37a6c4bfa408234ef3efe1846236a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/intel/skylake/chip.c22
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c17
2 files changed, 19 insertions, 20 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index a7d58720a5..212c24467e 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -153,10 +153,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
/* Enable ISH if device is on */
dev = pcidev_path_on_root(PCH_DEVFN_ISH);
- if (dev)
- params->IshEnable = dev->enabled;
- else
- params->IshEnable = 0;
+ params->IshEnable = dev ? dev->enabled : 0;
params->EnableAzalia = config->EnableAzalia;
params->IoBufferOwnership = config->IoBufferOwnership;
@@ -210,23 +207,24 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
* do the changes and then lock it back in coreboot
*
*/
- if (config->HeciEnabled == 0)
- params->PsfUnlock = 1;
- else
- params->PsfUnlock = 0;
+ params->PsfUnlock = !config->HeciEnabled;
for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++)
fill_vr_domain_config(params, i, &config->domain_vr_config[i]);
/* Show SPI controller if enabled in devicetree.cb */
dev = pcidev_path_on_root(PCH_DEVFN_SPI);
- params->ShowSpiController = dev->enabled;
+ params->ShowSpiController = dev ? dev->enabled : 0;
/* Enable xDCI controller if enabled in devicetree and allowed */
dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
- if (!xdci_can_enable())
- dev->enabled = 0;
- params->XdciEnable = dev->enabled;
+ if (dev) {
+ if (!xdci_can_enable())
+ dev->enabled = 0;
+ params->XdciEnable = dev->enabled;
+ } else {
+ params->XdciEnable = 0;
+ }
params->SendVrMbxCmd = config->SendVrMbxCmd;
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 85d3edf330..e9c37d67c9 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -354,10 +354,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* If ISH is enabled, enable ISH elements */
dev = pcidev_path_on_root(PCH_DEVFN_ISH);
- if (dev)
- params->PchIshEnable = dev->enabled;
- else
- params->PchIshEnable = 0;
+ params->PchIshEnable = dev ? dev->enabled : 0;
params->PchHdaEnable = config->EnableAzalia;
params->PchHdaIoBufferOwnership = config->IoBufferOwnership;
@@ -433,13 +430,17 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Show SPI controller if enabled in devicetree.cb */
dev = pcidev_path_on_root(PCH_DEVFN_SPI);
- params->ShowSpiController = dev->enabled;
+ params->ShowSpiController = dev ? dev->enabled : 0;
/* Enable xDCI controller if enabled in devicetree and allowed */
dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
- if (!xdci_can_enable())
- dev->enabled = 0;
- params->XdciEnable = dev->enabled;
+ if (dev) {
+ if (!xdci_can_enable())
+ dev->enabled = 0;
+ params->XdciEnable = dev->enabled;
+ } else {
+ params->XdciEnable = 0;
+ }
/* Enable or disable Gaussian Mixture Model in devicetree */
dev = pcidev_path_on_root(SA_DEVFN_GMM);