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authorRonak Kanabar <ronak.kanabar@intel.com>2019-01-30 18:53:14 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-01-31 08:44:17 +0000
commitc6c4d00182fe5083a3be43a76aa7bba71f57b0bb (patch)
treef000862c87c87f322bc48a3c9a4962d2e96336af
parent003fdcbda2fd1559b15e68ea1c5c23be8646ff2c (diff)
downloadcoreboot-c6c4d00182fe5083a3be43a76aa7bba71f57b0bb.tar.xz
soc/intel/cannonlake: Make correct C-state entries for S0ix and non-S0ix
TEST=Dump SSDT entries to verify _CST between S0ix enable and disable. Change-Id: I25e8f8c13bb91c2645e8e9fdfdf9ba4d7022f1b1 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/31154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
-rw-r--r--src/soc/intel/cannonlake/acpi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 4dab3342f7..f9f3e9699a 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -121,13 +121,13 @@ static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
},
};
-static int cstate_set_s0ix[] = {
+static int cstate_set_non_s0ix[] = {
C_STATE_C1E,
C_STATE_C6_LONG_LAT,
C_STATE_C7S_LONG_LAT
};
-static int cstate_set_non_s0ix[] = {
+static int cstate_set_s0ix[] = {
C_STATE_C1E,
C_STATE_C7S_LONG_LAT,
C_STATE_C10