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authorJohnny Lin <johnny_lin@wiwynn.com>2020-05-19 14:04:16 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-07-08 07:24:11 +0000
commitcef108cc906b8276efdd005fc51fb1b180fb272b (patch)
treeaa5a747de5fae2e77d4a15b4f59ec722ea8aa73b
parentb8fbf3f97215b00401f76b76580d3bb2d3a5c0cc (diff)
downloadcoreboot-cef108cc906b8276efdd005fc51fb1b180fb272b.tar.xz
mb/ocp/deltalake: Update IIO PCIe bifurcation according to different configs
In romstage get the config from BMC IPMI and update the IIO accordingly. Tested on OCP Delta Lake with FSP WW24 release, with lspci checking bifurcation register values are expected. Change-Id: I412336c32d093fe2bbdc7175f8e596923c77876f Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
-rw-r--r--src/mainboard/ocp/deltalake/Kconfig1
-rw-r--r--src/mainboard/ocp/deltalake/Makefile.inc1
-rw-r--r--src/mainboard/ocp/deltalake/romstage.c39
3 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/ocp/deltalake/Kconfig b/src/mainboard/ocp/deltalake/Kconfig
index 45fbcbf8b6..b4e88b51ed 100644
--- a/src/mainboard/ocp/deltalake/Kconfig
+++ b/src/mainboard/ocp/deltalake/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_COOPERLAKE_SP
select SUPERIO_ASPEED_AST2400
select IPMI_KCS
+ select IPMI_KCS_ROMSTAGE
select OCP_DMI
select VPD
select VPD_SMBIOS_VERSION
diff --git a/src/mainboard/ocp/deltalake/Makefile.inc b/src/mainboard/ocp/deltalake/Makefile.inc
index 14162bb1da..4fb50b2e2c 100644
--- a/src/mainboard/ocp/deltalake/Makefile.inc
+++ b/src/mainboard/ocp/deltalake/Makefile.inc
@@ -3,6 +3,7 @@
bootblock-y += bootblock.c
romstage-y += romstage.c
+romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi.c
ramstage-y += ramstage.c ipmi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index fb9a549033..68ff113474 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -1,9 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h>
#include <fsp/api.h>
#include <FspmUpd.h>
#include <soc/romstage.h>
+#include "ipmi.h"
+
+/* Update bifurcation settings according to different Configs */
+static void oem_update_iio(FSPM_UPD *mupd)
+{
+ uint8_t pcie_config = 0;
+
+ /* Default set to PCIE_CONFIG_C first */
+ mupd->FspmConfig.IioConfigIOU0[0] = IIO_BIFURCATE_x4x4x4x4;
+ mupd->FspmConfig.IioConfigIOU1[0] = IIO_BIFURCATE_x4x4x4x4;
+ mupd->FspmConfig.IioConfigIOU2[0] = IIO_BIFURCATE_xxxxxxxx;
+ mupd->FspmConfig.IioConfigIOU3[0] = IIO_BIFURCATE_xxxxxx16;
+ mupd->FspmConfig.IioConfigIOU4[0] = IIO_BIFURCATE_xxxxxxxx;
+ /* Update IIO bifurcation according to different Configs */
+ if (ipmi_get_pcie_config(&pcie_config) == CB_SUCCESS) {
+ printk(BIOS_DEBUG, "get IPMI PCIe config: %d\n", pcie_config);
+ switch (pcie_config) {
+ case PCIE_CONFIG_A:
+ mupd->FspmConfig.IioConfigIOU0[0] = IIO_BIFURCATE_xxxxxxxx;
+ mupd->FspmConfig.IioConfigIOU3[0] = IIO_BIFURCATE_xxxxxxxx;
+ break;
+ case PCIE_CONFIG_B:
+ mupd->FspmConfig.IioConfigIOU0[0] = IIO_BIFURCATE_xxxxxxxx;
+ mupd->FspmConfig.IioConfigIOU3[0] = IIO_BIFURCATE_x4x4x4x4;
+ break;
+ case PCIE_CONFIG_D:
+ mupd->FspmConfig.IioConfigIOU3[0] = IIO_BIFURCATE_x4x4x4x4;
+ break;
+ case PCIE_CONFIG_C:
+ default:
+ break;
+ }
+ } else {
+ printk(BIOS_ERR, "%s failed to get IPMI PCIe config\n", __func__);
+ }
+}
+
/*
* Configure GPIO depend on platform
*/
@@ -17,6 +55,7 @@ static void mainboard_config_iio(FSPM_UPD *mupd)
/* Send FSP log message to SOL */
mupd->FspmConfig.SerialIoUartDebugEnable = 1;
mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8;
+ oem_update_iio(mupd);
}
void mainboard_memory_init_params(FSPM_UPD *mupd)