diff options
author | Duncan Laurie <dlaurie@google.com> | 2018-12-05 15:41:03 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-07 11:19:16 +0000 |
commit | d2226060aac315c4420dc57569d90af5b0bf32c0 (patch) | |
tree | b2a30420080a13dac5cf2d3f7762c32a6507856e | |
parent | 4afefd648b28d4ebabd6d07790037e3e00c9ff03 (diff) | |
download | coreboot-d2226060aac315c4420dc57569d90af5b0bf32c0.tar.xz |
mb/google/sarien: Set initial I2C bus rise/fall times
Provide rise/fall times as measured on existing boards. This will
need adjusted for new boards but provides a starting point that
makes I2C clocks look reasonable.
Tested by measuring I2C bus speed and rise/fall times with a scope.
Change-Id: Ic18010f5efc41dcee8925d696767ba2c44e3df4b
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
-rw-r--r-- | src/mainboard/google/sarien/variants/arcada/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/google/sarien/variants/sarien/devicetree.cb | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index f4879792de..54308e1852 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -67,10 +67,14 @@ chip soc/intel/cannonlake }, .i2c[1] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 216, + .fall_time_ns = 28, }, .i2c[4] = { .early_init = 1, .speed = I2C_SPEED_FAST, + .rise_time_ns = 452, + .fall_time_ns = 110, }, }" diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 5004abf1b8..6afc13c694 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -67,10 +67,14 @@ chip soc/intel/cannonlake }, .i2c[1] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 290, + .fall_time_ns = 110, }, .i2c[4] = { .early_init = 1, .speed = I2C_SPEED_FAST, + .rise_time_ns = 280, + .fall_time_ns = 90, }, }" |