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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 16:17:26 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 07:06:13 +0000
commitdc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (patch)
treef1bde11a320b587f99bc3a62e654ab1be346ea24
parent05d7d82d37ae04ec4cf3579eb1c0f7bf0c0b7aa2 (diff)
downloadcoreboot-dc2e7c6e0fb1331a7808c226992c71e07f9ca7bd.tar.xz
nb/intel/sandybridge: Make the mainboard_early_init hook optional
This adds an empty weakly linked default. The rationale behind this change is that without the callback some features might not work but that the result is likely still able to boot, so it can be made optional. Change-Id: I62c8010aa81fc45d208e9293feb2f45b45f34a82 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36780 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--src/mainboard/apple/macbookair4_2/romstage.c4
-rw-r--r--src/mainboard/asrock/b75pro3-m/romstage.c4
-rw-r--r--src/mainboard/asus/h61m-cs/romstage.c4
-rw-r--r--src/mainboard/asus/maximus_iv_gene-z/romstage.c4
-rw-r--r--src/mainboard/asus/p8h61-m_lx/romstage.c4
-rw-r--r--src/mainboard/asus/p8h61-m_pro/romstage.c4
-rw-r--r--src/mainboard/asus/p8z77-m_pro/romstage.c4
-rw-r--r--src/mainboard/compulab/intense_pc/romstage.c4
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/romstage.c4
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c4
-rw-r--r--src/mainboard/google/butterfly/romstage.c4
-rw-r--r--src/mainboard/google/parrot/romstage.c4
-rw-r--r--src/mainboard/hp/2570p/romstage.c4
-rw-r--r--src/mainboard/hp/2760p/romstage.c4
-rw-r--r--src/mainboard/hp/8460p/romstage.c4
-rw-r--r--src/mainboard/hp/8470p/romstage.c4
-rw-r--r--src/mainboard/hp/8770w/romstage.c4
-rw-r--r--src/mainboard/hp/compaq_8200_elite_sff/romstage.c4
-rw-r--r--src/mainboard/hp/folio_9470m/romstage.c4
-rw-r--r--src/mainboard/hp/revolve_810_g1/romstage.c4
-rw-r--r--src/mainboard/hp/z220_sff_workstation/romstage.c4
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c4
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c4
-rw-r--r--src/mainboard/lenovo/l520/romstage.c4
-rw-r--r--src/mainboard/lenovo/s230u/romstage.c4
-rw-r--r--src/mainboard/lenovo/t430s/variants/t431s/romstage.c4
-rw-r--r--src/mainboard/lenovo/x131e/romstage.c4
-rw-r--r--src/mainboard/lenovo/x1_carbon_gen1/romstage.c4
-rw-r--r--src/mainboard/lenovo/x220/romstage.c4
-rw-r--r--src/mainboard/lenovo/x230/romstage.c4
-rw-r--r--src/mainboard/msi/ms7707/romstage.c4
-rw-r--r--src/mainboard/roda/rv11/romstage.c4
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/romstage.c4
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c4
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h2
35 files changed, 6 insertions, 132 deletions
diff --git a/src/mainboard/apple/macbookair4_2/romstage.c b/src/mainboard/apple/macbookair4_2/romstage.c
index d04582d1ed..a7c543dd49 100644
--- a/src/mainboard/apple/macbookair4_2/romstage.c
+++ b/src/mainboard/apple/macbookair4_2/romstage.c
@@ -49,10 +49,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c
index da895b31fd..fe6d1833d2 100644
--- a/src/mainboard/asrock/b75pro3-m/romstage.c
+++ b/src/mainboard/asrock/b75pro3-m/romstage.c
@@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
/* Set GPIOs on superio, enable UART */
diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c
index 2064f14e22..37b07e51d9 100644
--- a/src/mainboard/asus/h61m-cs/romstage.c
+++ b/src/mainboard/asus/h61m-cs/romstage.c
@@ -52,10 +52,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
nuvoton_pnp_enter_conf_state(SIO_DEV);
diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
index fcf78d2e68..6cf206b47c 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c
+++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
@@ -48,10 +48,6 @@ void mainboard_rcba_config(void)
{
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
diff --git a/src/mainboard/asus/p8h61-m_lx/romstage.c b/src/mainboard/asus/p8h61-m_lx/romstage.c
index 09ca7db238..5f94d17cf4 100644
--- a/src/mainboard/asus/p8h61-m_lx/romstage.c
+++ b/src/mainboard/asus/p8h61-m_lx/romstage.c
@@ -51,10 +51,6 @@ void mainboard_rcba_config(void)
{
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c
index 73848285a9..60d311d98c 100644
--- a/src/mainboard/asus/p8h61-m_pro/romstage.c
+++ b/src/mainboard/asus/p8h61-m_pro/romstage.c
@@ -53,10 +53,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
/* Enable UART */
diff --git a/src/mainboard/asus/p8z77-m_pro/romstage.c b/src/mainboard/asus/p8z77-m_pro/romstage.c
index 9c5e443908..db2d303e8c 100644
--- a/src/mainboard/asus/p8z77-m_pro/romstage.c
+++ b/src/mainboard/asus/p8z77-m_pro/romstage.c
@@ -56,10 +56,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 2, 6 } /* Port 13: Unused. Asus propietary DEBUG_PORT ??? */
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
/* Setup COM/UART */
diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index f74e94d042..8198d8af6e 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -60,10 +60,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
const u16 port = SIO_PORT;
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
index ecbd393b2b..f67d51b8be 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
@@ -78,10 +78,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 5, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
/* FIXME: The GA-B75M-D3V only has two DIMM slots! */
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
{
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
index 8a17ac9a56..1df5bfd80c 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
@@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
if (!CONFIG(NO_UART_ON_SUPERIO)) {
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 844f754cfc..449ccf507e 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -112,10 +112,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd(&spd[2], 0x52, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 210c7fc04c..8893819446 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -84,10 +84,6 @@ void mainboard_rcba_config(void)
RCBA32(FD) = reg32;
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c
index 6ffc3409a5..4f7ca3a18c 100644
--- a/src/mainboard/hp/2570p/romstage.c
+++ b/src/mainboard/hp/2570p/romstage.c
@@ -45,10 +45,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
kbc1126_enter_conf();
diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c
index b448f79259..a696faec36 100644
--- a/src/mainboard/hp/2760p/romstage.c
+++ b/src/mainboard/hp/2760p/romstage.c
@@ -44,10 +44,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
kbc1126_enter_conf();
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index 72a62c9eb3..77c355bb23 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 }, /* docking */
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c
index 83f382d0a4..890e65b07c 100644
--- a/src/mainboard/hp/8470p/romstage.c
+++ b/src/mainboard/hp/8470p/romstage.c
@@ -47,10 +47,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c
index 2bd9162beb..49a5b1af48 100644
--- a/src/mainboard/hp/8770w/romstage.c
+++ b/src/mainboard/hp/8770w/romstage.c
@@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 }, /* Conn (eSATA Combo) */
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
index 258eac74b2..90cfcc93aa 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
+++ b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
@@ -52,10 +52,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
if (CONFIG(CONSOLE_SERIAL))
diff --git a/src/mainboard/hp/folio_9470m/romstage.c b/src/mainboard/hp/folio_9470m/romstage.c
index 061a06877c..3f174a19fb 100644
--- a/src/mainboard/hp/folio_9470m/romstage.c
+++ b/src/mainboard/hp/folio_9470m/romstage.c
@@ -46,10 +46,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 0, 6 }, /* B1P6 */
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
kbc1126_enter_conf();
diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c
index 5c83a91511..8a40578f0a 100644
--- a/src/mainboard/hp/revolve_810_g1/romstage.c
+++ b/src/mainboard/hp/revolve_810_g1/romstage.c
@@ -50,10 +50,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 0, 6 }, /* B1P6 */
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
kbc1126_enter_conf();
diff --git a/src/mainboard/hp/z220_sff_workstation/romstage.c b/src/mainboard/hp/z220_sff_workstation/romstage.c
index 6c139ed34d..bd0a377580 100644
--- a/src/mainboard/hp/z220_sff_workstation/romstage.c
+++ b/src/mainboard/hp/z220_sff_workstation/romstage.c
@@ -52,10 +52,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 7 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
if (CONFIG(CONSOLE_SERIAL))
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 984629574c..7f3a58d0f2 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -52,10 +52,6 @@ void mainboard_rcba_config(void)
MCHBAR32(0x0104) |= 0x00001000;
}
-void mainboard_early_init(int s3resume)
-{
-}
-
static const u16 hwm_initvals[] = {
HWM_BANK(0),
HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index d56576e2e5..e7959ef32f 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -153,10 +153,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd(&spd[2], 0x52, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
int mainboard_should_reset_usb(int s3resume)
{
return !s3resume;
diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c
index 82f63776d9..fc67e5adcf 100644
--- a/src/mainboard/lenovo/l520/romstage.c
+++ b/src/mainboard/lenovo/l520/romstage.c
@@ -47,10 +47,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c
index 754c49aa4f..48d26c2519 100644
--- a/src/mainboard/lenovo/s230u/romstage.c
+++ b/src/mainboard/lenovo/s230u/romstage.c
@@ -64,10 +64,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/lenovo/t430s/variants/t431s/romstage.c b/src/mainboard/lenovo/t430s/variants/t431s/romstage.c
index e7b43db487..3f62f06c58 100644
--- a/src/mainboard/lenovo/t430s/variants/t431s/romstage.c
+++ b/src/mainboard/lenovo/t430s/variants/t431s/romstage.c
@@ -54,7 +54,3 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
memcpy(&spd[0], spd_file, spd_file_len);
read_spd(&spd[2], 0x51, id_only);
}
-
-void mainboard_early_init(int s3resume)
-{
-}
diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 2a6ee2733b..6f176c78f7 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -51,10 +51,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd(&spd[2], 0x52, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index b779c4eff5..eb2a5b19f5 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -104,10 +104,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
memcpy(&spd[2], memory, 256);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index af92f9ba8e..8460208ddb 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -91,10 +91,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd (&spd[2], 0x51, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index 60016a4f07..6f1013567b 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -56,10 +56,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd (&spd[2], 0x51, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/msi/ms7707/romstage.c b/src/mainboard/msi/ms7707/romstage.c
index a797f5099c..8f83c8684c 100644
--- a/src/mainboard/msi/ms7707/romstage.c
+++ b/src/mainboard/msi/ms7707/romstage.c
@@ -49,10 +49,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{1, 0, 6},
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/mainboard/roda/rv11/romstage.c b/src/mainboard/roda/rv11/romstage.c
index b36725c213..a54a9ad6ce 100644
--- a/src/mainboard/roda/rv11/romstage.c
+++ b/src/mainboard/roda/rv11/romstage.c
@@ -27,10 +27,6 @@ void mainboard_rcba_config(void)
RCBA32(FD) = reg32;
}
-void mainboard_early_init(int s3resume)
-{
-}
-
int mainboard_should_reset_usb(int s3resume)
{
return !s3resume;
diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c
index ff5bb701a8..7fcde773b1 100644
--- a/src/mainboard/sapphire/pureplatinumh61/romstage.c
+++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c
@@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_early_init(int s3resume)
-{
-}
-
void mainboard_config_superio(void)
{
}
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 55f2928213..92882b4b61 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -30,6 +30,10 @@
#include <southbridge/intel/common/pmclib.h>
#include <elog.h>
+__weak void mainboard_early_init(int s3_resume)
+{
+}
+
static void early_pch_reset_pmcon(void)
{
u8 reg8;
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 31d4358e7b..d667e36571 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -213,6 +213,8 @@ void northbridge_romstage_finalize(int s3resume);
void early_init_dmi(void);
void pch_enable_lpc(void);
+/* mainboard_early_init: Optional mainboard callback run after console init
+ but before raminit. */
void mainboard_early_init(int s3resume);
void mainboard_config_superio(void);
int mainboard_should_reset_usb(int s3resume);