mb/**/{devicetree,overridetree}.cb: Indent with tabs

Use tabs instead of eight (sometimes less) spaces.

Change-Id: Ic3d61f5210d21d9613fc50b47b90af71f544169a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

22 files changed, 210 insertions, 210 deletions

diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb
index 1f898d55e4..c873e4e904 100644
--- a/src/mainboard/amd/south_station/devicetree.cb
+++ b/src/mainboard/amd/south_station/devicetree.cb
@@ -1,13 +1,13 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 chip northbridge/amd/agesa/family14/root_complex
-        device cpu_cluster 0 on
-                chip cpu/amd/agesa/family14
+	device cpu_cluster 0 on
+		chip cpu/amd/agesa/family14
 			device lapic 0 on end
-                end
-        end
-        device domain 0 on
-                subsystemid 0x1022 0x1510 inherit
+		end
+	end
+	device domain 0 on
+		subsystemid 0x1022 0x1510 inherit
 		chip northbridge/amd/agesa/family14
 			device pci 0.0 on end # Root Complex
 			device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
@@ -85,5 +85,5 @@ chip northbridge/amd/agesa/family14/root_complex
 
 		end # agesa northbridge
 
-        end #domain
+	end #domain
 end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb
index 185369a3d5..6c88931d17 100644
--- a/src/mainboard/amd/union_station/devicetree.cb
+++ b/src/mainboard/amd/union_station/devicetree.cb
@@ -1,13 +1,13 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 chip northbridge/amd/agesa/family14/root_complex
-        device cpu_cluster 0 on
-                chip cpu/amd/agesa/family14
+	device cpu_cluster 0 on
+		chip cpu/amd/agesa/family14
 			device lapic 0 on end
-                end
-        end
-        device domain 0 on
-                subsystemid 0x1022 0x1510 inherit
+		end
+	end
+	device domain 0 on
+		subsystemid 0x1022 0x1510 inherit
 		chip northbridge/amd/agesa/family14
 			device pci 0.0 on end # Root Complex
 			device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
@@ -61,5 +61,5 @@ chip northbridge/amd/agesa/family14/root_complex
 
 		end # agesa northbridge
 
-        end #domain
+	end #domain
 end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb
index 75020712fc..9d22761a7c 100644
--- a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb
+++ b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb
@@ -69,8 +69,8 @@ chip northbridge/intel/x4x		# Northbridge
 					chip superio/winbond/w83627dhg
 					device pnp 2e.0 on		# Floppy
 						io 0x60 = 0x3f0
-                                                irq 0x70 = 6
-                                                drq 0x74 = 2
+						irq 0x70 = 6
+						drq 0x74 = 2
 					end
 					device pnp 2e.1 on		# Parallel port
 						# global
diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
index a37d2e7b74..3943882812 100644
--- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
@@ -147,12 +147,12 @@ chip soc/intel/jasperlake
 				device i2c 1a on end
 			end
 		end #I2C 4
-                device pci 1f.3 on
-                        chip drivers/generic/max98357a
-                                register "hid" = ""MX98360A""
+		device pci 1f.3 on
+			chip drivers/generic/max98357a
+				register "hid" = ""MX98360A""
 				register "sdmode_gpio" =  "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)"
-                                device generic 0 on end
-                        end
-                end # Intel HDA
+				device generic 0 on end
+			end
+		end # Intel HDA
 	end
 end
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb
index 34d235856e..4241a46640 100644
--- a/src/mainboard/google/hatch/variants/helios/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb
@@ -36,7 +36,7 @@ chip soc/intel/cannonlake
 			.speed = I2C_SPEED_FAST,
 			.rise_time_ns = 50,
 			.fall_time_ns = 15,
-		        .data_hold_time_ns = 330,
+			.data_hold_time_ns = 330,
 		},
 		.i2c[1] = {
 			.speed = I2C_SPEED_FAST,
diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb
index 6accd0cc92..6fbe95058f 100644
--- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb
@@ -52,7 +52,7 @@ chip soc/intel/cannonlake
 			.speed = I2C_SPEED_FAST,
 			.rise_time_ns = 50,
 			.fall_time_ns = 15,
-		        .data_hold_time_ns = 330,
+			.data_hold_time_ns = 330,
 		},
 		.i2c[1] = {
 			.speed = I2C_SPEED_FAST,
diff --git a/src/mainboard/google/hatch/variants/palkia/overridetree.cb b/src/mainboard/google/hatch/variants/palkia/overridetree.cb
index 73cf0f21b9..8cdb2a9fb3 100644
--- a/src/mainboard/google/hatch/variants/palkia/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/palkia/overridetree.cb
@@ -29,7 +29,7 @@ chip soc/intel/cannonlake
 	#+-------------------+---------------------------+
 	#| I2C0		     | Trackpad			 |
 	#| I2C1		     | Touchscreen		 |
-	#| I2C2              | 2nd Touchscreen	         |
+	#| I2C2              | 2nd Touchscreen		 |
 	#| I2C4		     | Audio			 |
 	#+-------------------+---------------------------+
 	register "common_soc_config" = "{
@@ -37,7 +37,7 @@ chip soc/intel/cannonlake
 			.speed = I2C_SPEED_FAST,
 			.rise_time_ns = 50,
 			.fall_time_ns = 15,
-		        .data_hold_time_ns = 330,
+			.data_hold_time_ns = 330,
 		},
 		.i2c[1] = {
 			.speed = I2C_SPEED_FAST,
diff --git a/src/mainboard/google/octopus/variants/bloog/overridetree.cb b/src/mainboard/google/octopus/variants/bloog/overridetree.cb
index 0212bea46d..6c2aa95747 100644
--- a/src/mainboard/google/octopus/variants/bloog/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/bloog/overridetree.cb
@@ -41,44 +41,44 @@ chip soc/intel/apollolake
 	# [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps.
 	register "emmc_rx_strobe_cntl" = "0x0b0b"
 
-        # Intel Common SoC Config
-        #+-------------------+---------------------------+
-        #| Field             |  Value                    |
-        #+-------------------+---------------------------+
-        #| GSPI0             | cr50 TPM. Early init is   |
-        #|                   | required to set up a BAR  |
-        #|                   | for TPM communication     |
-        #|                   | before memory is up       |
-        #| I2C5              | Audio                     |
-        #| I2C6              | Trackpad                  |
-        #| I2C7              | Touchscreen               |
-        #+-------------------+---------------------------+
+	# Intel Common SoC Config
+	#+-------------------+---------------------------+
+	#| Field             |  Value                    |
+	#+-------------------+---------------------------+
+	#| GSPI0             | cr50 TPM. Early init is   |
+	#|                   | required to set up a BAR  |
+	#|                   | for TPM communication     |
+	#|                   | before memory is up       |
+	#| I2C5              | Audio                     |
+	#| I2C6              | Trackpad                  |
+	#| I2C7              | Touchscreen               |
+	#+-------------------+---------------------------+
 
-        register "tcc_offset" = "10"
+	register "tcc_offset" = "10"
 
-        register "common_soc_config" = "{
-                .gspi[0] = {
-                        .speed_mhz = 1,
-                        .early_init = 1,
-                },
-                .i2c[5] = {
-                        .speed = I2C_SPEED_FAST,
-                        .rise_time_ns = 104,
-                        .fall_time_ns = 52,
-                },
-                .i2c[6] = {
-                        .speed = I2C_SPEED_FAST,
-                        .rise_time_ns = 66,
-                        .fall_time_ns = 90,
-                        .data_hold_time_ns = 350,
-                },
-                .i2c[7] = {
-                        .speed = I2C_SPEED_FAST,
-                        .rise_time_ns = 44,
-                        .fall_time_ns = 90,
-                },
+	register "common_soc_config" = "{
+		.gspi[0] = {
+			.speed_mhz = 1,
+			.early_init = 1,
+		},
+		.i2c[5] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 104,
+			.fall_time_ns = 52,
+		},
+		.i2c[6] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 66,
+			.fall_time_ns = 90,
+			.data_hold_time_ns = 350,
+		},
+		.i2c[7] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 44,
+			.fall_time_ns = 90,
+		},
 
-        }"
+	}"
 
 	device domain 0 on
 		device pci 16.0 off  end     # - I2C 0
@@ -124,34 +124,34 @@ chip soc/intel/apollolake
 				register "has_power_resource" = "1"
 				device i2c 10 on end
 			end
-                        chip drivers/i2c/hid
-                                register "generic.hid" = ""GDIX0000""
-                                register "generic.desc" = ""Goodix Touchscreen""
-                                register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
-                                register "generic.probed" = "1"
-                                register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
-                                register "generic.reset_delay_ms" = "120"
-                                register "generic.reset_off_delay_ms" = "3"
-                                register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
-                                register "generic.has_power_resource" = "1"
-                                register "generic.enable_delay_ms" = "10"
-                                register "hid_desc_reg_offset" = "0x01"
-                                device i2c 5d on end
-                        end
-                        chip drivers/i2c/hid
-                               register "generic.hid" = ""GTCH7503""
-                               register "generic.desc" = ""G2TOUCH Touchscreen""
-                               register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
-                               register "generic.probed" = "1"
-                               register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
-                               register "generic.reset_delay_ms" = "50"
-                               register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
-                               register "generic.enable_delay_ms" = "1"
-                               register "generic.has_power_resource" = "1"
-                               register "generic.disable_gpio_export_in_crs" = "1"
-                               register "hid_desc_reg_offset" = "0x01"
-                               device i2c 40 on end
-                       end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""GDIX0000""
+				register "generic.desc" = ""Goodix Touchscreen""
+				register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
+				register "generic.probed" = "1"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+				register "generic.reset_delay_ms" = "120"
+				register "generic.reset_off_delay_ms" = "3"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+				register "generic.has_power_resource" = "1"
+				register "generic.enable_delay_ms" = "10"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 5d on end
+			end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""GTCH7503""
+				register "generic.desc" = ""G2TOUCH Touchscreen""
+				register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
+				register "generic.probed" = "1"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+				register "generic.reset_delay_ms" = "50"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+				register "generic.enable_delay_ms" = "1"
+				register "generic.has_power_resource" = "1"
+				register "generic.disable_gpio_export_in_crs" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 40 on end
+			end
 		end	# - I2C 7
 	end
 
diff --git a/src/mainboard/google/octopus/variants/lick/overridetree.cb b/src/mainboard/google/octopus/variants/lick/overridetree.cb
index 3ade35402f..af6711a5fc 100644
--- a/src/mainboard/google/octopus/variants/lick/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/lick/overridetree.cb
@@ -52,7 +52,7 @@ chip soc/intel/apollolake
 	#| I2C5              | Audio                     |
 	#| I2C6              | Trackpad                  |
 	#+-------------------+---------------------------+
-        register "tcc_offset" = "15"
+	register "tcc_offset" = "15"
 
 	register "common_soc_config" = "{
 		.gspi[0] = {
diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
index b80d0317c8..9ce2a0b2cf 100644
--- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb
@@ -159,18 +159,18 @@ chip soc/intel/apollolake
 				register "hid_desc_reg_offset" = "0x20"
 				device i2c 20 on end
 			end
-                        chip drivers/i2c/generic
-                               register "hid" = ""RAYD0001""
-                               register "desc" = ""Raydium Touchscreen""
-                               register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
-                               register "probed" = "1"
-                               register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
-                               register "reset_delay_ms" = "1"
-                               register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
-                               register "enable_delay_ms" = "50"
-                               register "has_power_resource" = "1"
-                               device i2c 39 on end
-                       end
+			chip drivers/i2c/generic
+				register "hid" = ""RAYD0001""
+				register "desc" = ""Raydium Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
+				register "probed" = "1"
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+				register "reset_delay_ms" = "1"
+				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+				register "enable_delay_ms" = "50"
+				register "has_power_resource" = "1"
+				device i2c 39 on end
+			end
 		end	# - I2C 7
 	end
 
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 8e1f954d8a..bf3b7bd923 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -366,19 +366,19 @@ chip soc/intel/skylake
 			end
 		end # I2C #1
 		device pci 15.2 on
-                        chip drivers/i2c/hid
-                                register "generic.hid" = ""WCOM005C""
-                                register "generic.desc" = ""WCOM Digitizer""
-                                register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)"
+			chip drivers/i2c/hid
+				register "generic.hid" = ""WCOM005C""
+				register "generic.desc" = ""WCOM Digitizer""
+				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)"
 				register "generic.probed" = "1"
 				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D3)"
 				register "generic.reset_delay_ms" = "20"
 				register "generic.has_power_resource" = "1"
 				register "generic.disable_gpio_export_in_crs" = "1"
 				register "generic.wake" = "GPE0_DW2_01"
-                                register "hid_desc_reg_offset" = "0x1"
-                                device i2c 0x9 on end
-                        end
+				register "hid_desc_reg_offset" = "0x1"
+				device i2c 0x9 on end
+			end
 			chip drivers/generic/gpio_keys
 				register "name" = ""PENH""
 				register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_E8)"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 0a67d4d7f9..d64bd8a022 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -144,8 +144,8 @@ chip soc/intel/skylake
 	register "PcieRpClkReqSupport[0]" = "1"
 	# RP 1 uses SRCCLKREQ1#
 	register "PcieRpClkReqNumber[0]" = "1"
-        # RP 1 uses uses CLK SRC 1
-        register "PcieRpClkSrcNumber[0]" = "1"
+	# RP 1 uses uses CLK SRC 1
+	register "PcieRpClkSrcNumber[0]" = "1"
 	# RP 1, Enable Advanced Error Reporting
 	register "PcieRpAdvancedErrorReporting[0]" = "1"
 	# RP 1, Enable Latency Tolerance Reporting Mechanism
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 8959a2902e..26207f529e 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -147,19 +147,19 @@ chip soc/intel/skylake
 	register "PcieRpAdvancedErrorReporting[0]" = "1"
 	register "PcieRpLtrEnable[0]" = "1"
 
-        # Root port 9 (x2)
-        #  PcieRpEnable:                 Enable root port
-        #  PcieRpClkReqSupport:          Enable CLKREQ#
-        #  PcieRpClkReqNumber:           Uses SRCCLKREQ2#
-        #  PcieRpClkSrcNumber:           Uses 3
-        #  PcieRpAdvancedErrorReporting: Enable Advanced Error Reporting
-        #  PcieRpLtrEnable:              Enable Latency Tolerance Reporting Mechanism
-        register "PcieRpEnable[8]" = "1"
-        register "PcieRpClkReqSupport[8]" = "1"
-        register "PcieRpClkReqNumber[8]" = "2"
-        register "PcieRpClkSrcNumber[8]" = "3"
-        register "PcieRpAdvancedErrorReporting[8]" = "1"
-        register "PcieRpLtrEnable[8]" = "1"
+	# Root port 9 (x2)
+	#  PcieRpEnable:                 Enable root port
+	#  PcieRpClkReqSupport:          Enable CLKREQ#
+	#  PcieRpClkReqNumber:           Uses SRCCLKREQ2#
+	#  PcieRpClkSrcNumber:           Uses 3
+	#  PcieRpAdvancedErrorReporting: Enable Advanced Error Reporting
+	#  PcieRpLtrEnable:              Enable Latency Tolerance Reporting Mechanism
+	register "PcieRpEnable[8]" = "1"
+	register "PcieRpClkReqSupport[8]" = "1"
+	register "PcieRpClkReqNumber[8]" = "2"
+	register "PcieRpClkSrcNumber[8]" = "3"
+	register "PcieRpAdvancedErrorReporting[8]" = "1"
+	register "PcieRpLtrEnable[8]" = "1"
 
 	# USB 2.0
 	register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)"	# Type-C Port 1
@@ -306,12 +306,12 @@ chip soc/intel/skylake
 				register "generic.desc" = ""WCOM Digitizer""
 				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
 				register "generic.speed" = "I2C_SPEED_FAST_PLUS"
-                                register "generic.probed" = "1"
-                                register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E11)"
-                                register "generic.reset_delay_ms" = "20"
-                                register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
-                                register "generic.enable_delay_ms" = "1"
-                                register "generic.has_power_resource" = "1"
+				register "generic.probed" = "1"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E11)"
+				register "generic.reset_delay_ms" = "20"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
+				register "generic.enable_delay_ms" = "1"
+				register "generic.has_power_resource" = "1"
 				register "generic.disable_gpio_export_in_crs" = "1"
 				register "hid_desc_reg_offset" = "0x1"
 				device i2c 0a on end
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 7e4da3fff8..f22c6262fd 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -340,7 +340,7 @@ chip soc/intel/cannonlake
 				device i2c 2c on end
 			end
 			chip drivers/i2c/hid
-			        register "generic.hid" = ""PNP0C50""
+				register "generic.hid" = ""PNP0C50""
 				register "generic.desc" = ""Cirque Touchpad""
 				register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
 				register "generic.probed" = "1"
diff --git a/src/mainboard/hp/z220_sff_workstation/devicetree.cb b/src/mainboard/hp/z220_sff_workstation/devicetree.cb
index 263d595d0e..bfabacce6c 100644
--- a/src/mainboard/hp/z220_sff_workstation/devicetree.cb
+++ b/src/mainboard/hp/z220_sff_workstation/devicetree.cb
@@ -14,7 +14,7 @@ chip northbridge/intel/sandybridge
 			register "c2_battery" = "3"
 			register "c3_acpower" = "5"
 			register "c3_battery" = "5"
-                        device lapic 0x0 on end
+			device lapic 0x0 on end
 			device lapic 0xacac off end
 		end
 	end
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb
index 93b5af9394..a8f6766340 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb
@@ -86,7 +86,7 @@ chip soc/intel/cannonlake
 		end
 		device pci 14.5 on  end # SDCard
 		device pci 15.0 on  end # I2C #0
-        device pci 15.1 on  end # I2C #1
+		device pci 15.1 on  end # I2C #1
 		device pci 15.2 off end # I2C #2
 		device pci 15.3 off end # I2C #3
 		device pci 17.0 on  end # SATA
@@ -95,7 +95,7 @@ chip soc/intel/cannonlake
 		device pci 19.2 on  end # UART #2
 		device pci 1a.0 on  end # eMMC
 		device pci 1c.0 on  end # PCI Express Port 1 x4 SLOT1
-        device pci 1c.4 on  end # PCI Express Port 5 x1 SLOT2/LAN
+		device pci 1c.4 on  end # PCI Express Port 5 x1 SLOT2/LAN
 		device pci 1c.5 off end # PCI Express Port 6
 		device pci 1c.6 off end # PCI Express Port 7
 		device pci 1c.7 off end # PCI Express Port 8
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 616e35c1b4..ae2aaf36ae 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -150,8 +150,8 @@ chip soc/intel/jasperlake
 			}
 		},
 		.i2c[5] = {
-                        .speed = I2C_SPEED_FAST,
-                },
+			.speed = I2C_SPEED_FAST,
+		},
 	}"
 
 	device domain 0 on
@@ -248,39 +248,39 @@ chip soc/intel/jasperlake
 		end
 		device pci 14.5 on  end # SDCard
 		device pci 15.0 on
-                       chip drivers/i2c/max98373
-                                register "vmon_slot_no" = "4"
-                                register "imon_slot_no" = "5"
-                                register "uid" = "0"
-                                register "desc" = ""RIGHT SPEAKER AMP""
-                                register "name" = ""MAXR""
-                                device i2c 31 on end
-                        end
-                        chip drivers/i2c/max98373
-                                register "vmon_slot_no" = "6"
-                                register "imon_slot_no" = "7"
-                                register "uid" = "1"
-                                register "desc" = ""LEFT SPEAKER AMP""
-                                register "name" = ""MAXL""
-                                device i2c 32 on end
-                        end
-                        chip drivers/i2c/da7219
-                                register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
-                                register "btn_cfg" = "50"
-                                register "mic_det_thr" = "500"
-                                register "jack_ins_deb" = "20"
-                                register "jack_det_rate" = ""32ms_64ms""
-                                register "jack_rem_deb" = "1"
-                                register "a_d_btn_thr" = "0xa"
-                                register "d_b_btn_thr" = "0x16"
-                                register "b_c_btn_thr" = "0x21"
-                                register "c_mic_btn_thr" = "0x3e"
-                                register "btn_avg" = "4"
-                                register "adc_1bit_rpt" = "1"
-                                register "micbias_lvl" = "2600"
-                                register "mic_amp_in_sel" = ""diff""
-                                device i2c 1a on end
-                        end
+			chip drivers/i2c/max98373
+				register "vmon_slot_no" = "4"
+				register "imon_slot_no" = "5"
+				register "uid" = "0"
+				register "desc" = ""RIGHT SPEAKER AMP""
+				register "name" = ""MAXR""
+				device i2c 31 on end
+			end
+			chip drivers/i2c/max98373
+				register "vmon_slot_no" = "6"
+				register "imon_slot_no" = "7"
+				register "uid" = "1"
+				register "desc" = ""LEFT SPEAKER AMP""
+				register "name" = ""MAXL""
+				device i2c 32 on end
+			end
+			chip drivers/i2c/da7219
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
+				register "btn_cfg" = "50"
+				register "mic_det_thr" = "500"
+				register "jack_ins_deb" = "20"
+				register "jack_det_rate" = ""32ms_64ms""
+				register "jack_rem_deb" = "1"
+				register "a_d_btn_thr" = "0xa"
+				register "d_b_btn_thr" = "0x16"
+				register "b_c_btn_thr" = "0x21"
+				register "c_mic_btn_thr" = "0x3e"
+				register "btn_avg" = "4"
+				register "adc_1bit_rpt" = "1"
+				register "micbias_lvl" = "2600"
+				register "mic_amp_in_sel" = ""diff""
+				device i2c 1a on end
+			end
 		end # I2C #0 Audio
 		device pci 15.1 off end # I2C #1
 		device pci 15.2 off end # I2C #2
@@ -296,14 +296,14 @@ chip soc/intel/jasperlake
 		device pci 19.1 on  end # I2C #5 Cam 1 and VCM
 		device pci 19.2 on  end # UART #2
 		device pci 1a.0 on  end # eMMC
-	        device pci 1c.0 on  end # PCI Express Port 1
-	        device pci 1c.1 off end # PCI Express Port 2
-	        device pci 1c.2 off end # PCI Express Port 3
-	        device pci 1c.3 off end # PCI Express Port 4
-	        device pci 1c.4 off end # PCI Express Port 5
-	        device pci 1c.5 on  end # PCI Express Port 6
-	        device pci 1c.6 off end # PCI Express Port 7
-	        device pci 1c.7 off end # PCI Express Port 8
+		device pci 1c.0 on  end # PCI Express Port 1
+		device pci 1c.1 off end # PCI Express Port 2
+		device pci 1c.2 off end # PCI Express Port 3
+		device pci 1c.3 off end # PCI Express Port 4
+		device pci 1c.4 off end # PCI Express Port 5
+		device pci 1c.5 on  end # PCI Express Port 6
+		device pci 1c.6 off end # PCI Express Port 7
+		device pci 1c.7 off end # PCI Express Port 8
 		device pci 1e.0 on  end # UART #0
 		device pci 1e.1 off end # UART #1
 		device pci 1e.2 off end # GSPI #0
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
index 5cfb10da50..9c9a2e767b 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
@@ -7,8 +7,8 @@ chip soc/intel/skylake
 	register "gen2_dec" = "0x000c0201"
 
 	# FSP Configuration
-        register "DspEnable" = "1"
-        register "IoBufferOwnership" = "0"
+	register "DspEnable" = "1"
+	register "IoBufferOwnership" = "0"
 	register "HeciEnabled" = "0"
 	register "PmTimerDisabled" = "1"
 	register "Cio2Enable" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
index e6c5c38d73..26be7dd751 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
@@ -117,25 +117,25 @@ chip soc/intel/skylake
 	register "PcieRpClkSrcNumber[8]" = "1"
 
 	# USB 2.0 Enable all ports
-        register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)"		# TYPE-A Port
-        register "usb2_ports[1]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
-        register "usb2_ports[2]" = "USB2_PORT_MAX(OC_SKIP)"	# Bluetooth
-        register "usb2_ports[4]" = "USB2_PORT_MAX(OC1)"		# Type-A Port
-        register "usb2_ports[5]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
-        register "usb2_ports[6]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
-        register "usb2_ports[7]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
-        register "usb2_ports[8]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
-        register "usb2_ports[9]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
-        register "usb2_ports[10]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
-        register "usb2_ports[11]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
-
-        # USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled
-        register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# TYPE-A Port
-        register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
-        register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
-        register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)"	# TYPE-A Port
-        register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)"	# TYPE-A Port
-        register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
+	register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)"		# TYPE-A Port
+	register "usb2_ports[1]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
+	register "usb2_ports[2]" = "USB2_PORT_MAX(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MAX(OC1)"		# Type-A Port
+	register "usb2_ports[5]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
+	register "usb2_ports[6]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
+	register "usb2_ports[7]" = "USB2_PORT_MAX(OC2)"		# TYPE-A Port
+	register "usb2_ports[8]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
+	register "usb2_ports[9]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
+	register "usb2_ports[10]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
+	register "usb2_ports[11]" = "USB2_PORT_MAX(OC_SKIP)"	# TYPE-A Port
+
+	# USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# TYPE-A Port
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)"	# TYPE-A Port
+	register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)"	# TYPE-A Port
+	register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# TYPE-A Port
 
 	register "SerialIoDevMode" = "{ \
 		[PchSerialIoIndexI2C0]  = PchSerialIoPci, \
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 85f9e51084..5d4d2462b2 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -32,8 +32,8 @@ chip soc/intel/tigerlake
 	register "usb3_ports[2]" = "USB3_PORT_EMPTY"		# Not used
 	register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# USB3/USB2 Flex Connector
 
-        # CPU replacement check
-        register "CpuReplacementCheck" = "1"
+	# CPU replacement check
+	register "CpuReplacementCheck" = "1"
 
 	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
 	register "gen1_dec" = "0x00fc0801"
@@ -138,7 +138,7 @@ chip soc/intel/tigerlake
 		},
 		.i2c[2] = {
 			.speed = I2C_SPEED_FAST,
-                },
+		},
 		.i2c[3] = {
 			.speed = I2C_SPEED_FAST,
 		},
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 5c275b3951..ccc4df89bb 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -32,8 +32,8 @@ chip soc/intel/tigerlake
 	register "usb3_ports[2]" = "USB3_PORT_EMPTY"		# Not used
 	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"	# USB3/USB2 Flex Connector
 
-        # CPU replacement check
-        register "CpuReplacementCheck" = "1"
+	# CPU replacement check
+	register "CpuReplacementCheck" = "1"
 
 	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
 	register "gen1_dec" = "0x00fc0801"
diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index 532ab9f3c8..b3649f906e 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -54,13 +54,13 @@ chip soc/intel/cannonlake
 	register "PcieRpEnable[15]" = "1"	# M2 Slot E x1
 	register "PcieRpEnable[20]" = "1"	# Slot 1 x4
 	# Set MaxPayload to 256 bytes
-        register "PcieRpMaxPayload[20]" = "RpMaxPayload_256"
-        # Enable Latency Tolerance Reporting Mechanism
-        register "PcieRpLtrEnable[20]" = "1"
-        # Enable Advanced Error Reporting
-        register "PcieRpAdvancedErrorReporting[20]" = "1"
-        # Disable Aspm
-        register "PcieRpAspm[20]" = "AspmDisabled"
+	register "PcieRpMaxPayload[20]" = "RpMaxPayload_256"
+	# Enable Latency Tolerance Reporting Mechanism
+	register "PcieRpLtrEnable[20]" = "1"
+	# Enable Advanced Error Reporting
+	register "PcieRpAdvancedErrorReporting[20]" = "1"
+	# Disable Aspm
+	register "PcieRpAspm[20]" = "AspmDisabled"
 
 	# Controls the CLKREQ, not the output directly.
 	# Depends on the CLKREQ to CLK gen mapping below