summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPeter Stuge <peter@stuge.se>2009-01-12 21:31:14 +0000
committerPeter Stuge <peter@stuge.se>2009-01-12 21:31:14 +0000
commite31a8d5c959abd8f6f1c0fdef9249ec99fed7602 (patch)
tree4e5291421d4a13a974d7adf18724c0bf07f5be8d
parent88ded318c3bd9415eb87790cee5c5dd889d0d683 (diff)
downloadcoreboot-e31a8d5c959abd8f6f1c0fdef9249ec99fed7602.tar.xz
flashrom: Board enable for GIGABYTE GA-MA78G-DS3H
This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge. The board uses GIGABYTE's patented BIOS failover technology, and at this point we do not know how to control which of the two chips flashrom actually hits. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Yul Rottmann <yulrottmann@bitel.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/board_enable.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c
index 42d59c0c66..2ea1dd93fb 100644
--- a/util/flashrom/board_enable.c
+++ b/util/flashrom/board_enable.c
@@ -634,6 +634,8 @@ struct board_pciid_enable board_pciid_enables[] = {
"gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash},
{0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash},
+ {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385,
+ NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash},
{0x1039, 0x0761, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash},
{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,