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authorJimmy Zhang <jimmzhang@nvidia.com>2014-12-09 16:44:21 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-13 17:04:51 +0200
commite994a8038849fdb360d30d195fa6d8bf417ea29a (patch)
tree8061ee497f755c20fd3b2f96670697e0aef6462d
parent099efebb1ea9f6ab1529e18fc4142c2e784d7cb5 (diff)
downloadcoreboot-e994a8038849fdb360d30d195fa6d8bf417ea29a.tar.xz
rush: Add and select DO_SOR_INIT config option
Select DO_SOR_INIT to enable dp display api BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Change-Id: Iddf19195722856865a7c06ce96492012ab729184 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 31492f51c030aeb7a3ac792a02665642ec999405 Original-Change-Id: I4daca43239235ca6d233c4457096d3b98fcaf65c Original-Reviewed-on: https://chromium-review.googlesource.com/234274 Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: http://review.coreboot.org/9586 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/mainboard/google/rush/Kconfig2
-rw-r--r--src/mainboard/google/rush/mainboard.c7
-rw-r--r--src/soc/nvidia/tegra132/Kconfig7
-rw-r--r--src/soc/nvidia/tegra132/Makefile.inc1
-rw-r--r--src/soc/nvidia/tegra132/dp.c34
-rw-r--r--src/soc/nvidia/tegra132/include/soc/display.h1
6 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig
index 95597b00f9..e565f47d0e 100644
--- a/src/mainboard/google/rush/Kconfig
+++ b/src/mainboard/google/rush/Kconfig
@@ -25,8 +25,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
+ select MAINBOARD_DO_NATIVE_VGA_INIT
select SPI_FLASH
select SOC_NVIDIA_TEGRA132
+ select MAINBOARD_DO_SOR_INIT
select MAINBOARD_HAS_BOOTBLOCK_INIT
select VIRTUAL_DEV_SWITCH
select BOARD_ROMSIZE_KB_4096
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
index 341d373971..0b85cc0356 100644
--- a/src/mainboard/google/rush/mainboard.c
+++ b/src/mainboard/google/rush/mainboard.c
@@ -29,6 +29,8 @@
#include <soc/nvidia/tegra/usb.h>
#include <soc/padconfig.h>
#include <soc/spi.h>
+#include <soc/nvidia/tegra/dc.h>
+#include <soc/display.h>
static const struct pad_config sdmmc3_pad[] = {
/* MMC3(SDCARD) */
@@ -146,6 +148,11 @@ static void mainboard_init(device_t dev)
i2c_init(I2C1_BUS); /* for max98090 codec */
}
+void display_startup(device_t dev)
+{
+ dp_display_startup(dev);
+}
+
static void mainboard_enable(device_t dev)
{
dev->ops->init = &mainboard_init;
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index aab888318b..0870c7e68c 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -27,6 +27,13 @@ config MAINBOARD_DO_DSI_INIT
help
Initialize dsi display
+config MAINBOARD_DO_SOR_INIT
+ bool "Use dp graphics interface"
+ depends on MAINBOARD_DO_NATIVE_VGA_INIT
+ default n
+ help
+ Initialize dp display
+
config BOOTBLOCK_CPU_INIT
string
default "soc/nvidia/tegra132/bootblock.c"
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index 25d1a5b0de..2beeb78c68 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -72,6 +72,7 @@ ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c
+ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c
ramstage-y += soc.c
ramstage-y += spi.c
diff --git a/src/soc/nvidia/tegra132/dp.c b/src/soc/nvidia/tegra132/dp.c
new file mode 100644
index 0000000000..7bd35e8a19
--- /dev/null
+++ b/src/soc/nvidia/tegra132/dp.c
@@ -0,0 +1,34 @@
+/*
+ * drivers/video/tegra/dc/dp.c
+ *
+ * Copyright (c) 2011-2013, NVIDIA Corporation.
+ * Copyright 2014 Google Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <soc/display.h>
+#include <soc/nvidia/tegra/dc.h>
+#include <stdlib.h>
+
+#include "chip.h"
+
+void dp_display_startup(device_t dev)
+{
+ struct soc_nvidia_tegra132_config *config = dev->chip_info;
+ struct display_controller *disp_ctrl =
+ (void *)config->display_controller;
+
+ printk(BIOS_INFO, "%s: entry: disp_ctrl: %p.\n",
+ __func__, disp_ctrl);
+}
diff --git a/src/soc/nvidia/tegra132/include/soc/display.h b/src/soc/nvidia/tegra132/include/soc/display.h
index 62c4c0f617..d7c172d71c 100644
--- a/src/soc/nvidia/tegra132/include/soc/display.h
+++ b/src/soc/nvidia/tegra132/include/soc/display.h
@@ -39,6 +39,7 @@ struct soc_nvidia_tegra132_config;
struct display_controller;
void dsi_display_startup(device_t dev);
+void dp_display_startup(device_t dev);
int tegra_dc_init(struct display_controller *disp_ctrl);
int update_display_mode(struct display_controller *disp_ctrl,