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authorDaniel Kurtz <djkurtz@chromium.org>2018-02-01 15:58:40 -0700
committerMartin Roth <martinroth@google.com>2018-02-06 15:18:36 +0000
commitf5e37751f3bac3c5b7f358792a54cd4e435bccbe (patch)
tree29598eef648f0a244730a2db273776a0d23decee
parente0ea98258a81e09542cdbe239e839e9698e582dd (diff)
downloadcoreboot-f5e37751f3bac3c5b7f358792a54cd4e435bccbe.tar.xz
google/kahlee: Initialize non-early i2c buses in mainboard_init
Initialize non-early i2c buses in ramstage. BUG=b:69407112 TEST=Boot depthcharge w/ CLI enabled on grunt. devbeep => plays beep BRANCH=None Change-Id: I634a7a823cc393243841dbd55e52abe3f0e72c5a Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/23554 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/mainboard/google/kahlee/mainboard.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index f1ae7b8d3e..b7adfc026a 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -164,6 +164,9 @@ static void mainboard_init(void *chip_info)
gpes = get_gpe_table(&num);
gpe_configure_sci(gpes, num);
+ /* Initialize i2c busses that were not initialized in bootblock */
+ i2c_soc_init();
+
/* Set GenIntDisable so that GPIO 90 is configured as a GPIO. */
if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_KAHLEE))
pm_write8(PM_PCIB_CFG,