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authorChristian Walter <christian.walter@9elements.com>2019-06-13 10:54:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-06-21 08:46:48 +0000
commitf70cb8bf968af75669325104756464ce6f4b824b (patch)
tree61b43bc235c4619297952dfa7d4d6dcf48f88974
parentbf1da4b4491455cee03e770a89711ac308da83bb (diff)
downloadcoreboot-f70cb8bf968af75669325104756464ce6f4b824b.tar.xz
soc/intel/skylake/romstage: Increase size of postcar stack
I increase the size oof the postcar stack to prevent a stack overflow during the measured boot feature. After common string functions have been moved from inline into .c file (https://review.coreboot.org/c/coreboot/+/32901), I experienced a stack overflow in the postcar stage while verifiying the romstage during measured boot. To prevent this, the stack size should be increased. To play it safe, it should be increased to 8 KiB - though this is open for discussion. Change-Id: I6f1a4631bcadfb8c7d1de5bf0919e40990a65606 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 2819c6f260..0eff793ac2 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -156,7 +156,7 @@ asmlinkage void car_stage_entry(void)
pmc_set_disb();
if (!s3wake)
save_dimm_info();
- if (postcar_frame_init(&pcf, 1*KiB))
+ if (postcar_frame_init(&pcf, 8*KiB))
die("Unable to initialize postcar frame.\n");
/*