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authorMarc Jones <marcj303@gmail.com>2018-02-08 23:19:29 -0700
committerMartin Roth <martinroth@google.com>2018-02-21 16:08:45 +0000
commitfa650f5e8c7cd81138b60d09d4a41b5454f03cc1 (patch)
tree5d1fdcbe556dcd663f65d03720228b7e79bde28e
parent950332b6e4c736bf948d2ebe8721bde568f5dfc0 (diff)
downloadcoreboot-fa650f5e8c7cd81138b60d09d4a41b5454f03cc1.tar.xz
soc/amd/stoneyridge: Add UMA save function
Save the UMA values from AGESA to use in resource allocation in ramstage. Change-Id: I2a218160649d934f615b2637ff122c36b4ba617e Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/23817 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h32
-rw-r--r--src/soc/amd/stoneyridge/sb_util.c24
3 files changed, 58 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index 2319b883d7..8dc27fb701 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -68,5 +68,7 @@
/* BiosRam Ranges at 0xfed80500 or I/O 0xcd4/0xcd5 */
#define BIOSRAM_CBMEM_TOP 0xf0 /* 4 bytes */
+#define BIOSRAM_UMA_SIZE 0xf4 /* 4 bytes */
+#define BIOSRAM_UMA_BASE 0xf8 /* 8 bytes */
#endif /* __SOC_STONEYRIDGE_IOMAP_H__ */
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index df78608cbb..3489afc0f9 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -340,6 +340,38 @@ void xhci_pm_write32(uint8_t reg, uint32_t value);
uint32_t xhci_pm_read32(uint8_t reg);
void bootblock_fch_early_init(void);
/**
+ * @brief Save the UMA bize returned by AGESA
+ *
+ * @param size = in bytes
+ *
+ * @return none
+ */
+void save_uma_size(uint32_t size);
+/**
+ * @brief Save the UMA base address returned by AGESA
+ *
+ * @param base = 64bit base address
+ *
+ * @return none
+ */
+void save_uma_base(uint64_t base);
+/**
+ * @brief Get the saved UMA size
+ *
+ * @param none
+ *
+ * @return size in bytes
+ */
+uint32_t get_uma_size(void);
+/**
+ * @brief Get the saved UMA base
+ *
+ * @param none
+ *
+ * @return 64bit base address
+ */
+uint64_t get_uma_base(void);
+/**
* @brief program a particular set of GPIO
*
* @param gpio_ptr = pointer to array of gpio configurations
diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c
index a98a334fe2..26c86e8238 100644
--- a/src/soc/amd/stoneyridge/sb_util.c
+++ b/src/soc/amd/stoneyridge/sb_util.c
@@ -164,3 +164,27 @@ int acpi_get_sleep_type(void)
{
return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk()));
}
+
+void save_uma_size(uint32_t size)
+{
+ biosram_write32(BIOSRAM_UMA_SIZE, size);
+}
+
+void save_uma_base(uint64_t base)
+{
+ biosram_write32(BIOSRAM_UMA_BASE, (uint32_t) base);
+ biosram_write32(BIOSRAM_UMA_BASE + 4, (uint32_t) (base >> 32));
+}
+
+uint32_t get_uma_size(void)
+{
+ return biosram_read32(BIOSRAM_UMA_SIZE);
+}
+
+uint64_t get_uma_base(void)
+{
+ uint64_t base;
+ base = biosram_read32(BIOSRAM_UMA_BASE);
+ base |= ((uint64_t)(biosram_read32(BIOSRAM_UMA_BASE + 4)) << 32);
+ return base;
+}