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authorZheng Bao <Zheng.bao@amd.com>2008-12-24 18:23:00 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-12-24 18:23:00 +0000
commit098d590d423a38fecaf8a4f1034b4f1710632ca0 (patch)
treedf4acd82ef99b32fdce68000ef765ecf71e9370c
parenta2f722abd40f6f946c1e45f2844b6cb4b29c68c7 (diff)
downloadcoreboot-098d590d423a38fecaf8a4f1034b4f1710632ca0.tar.xz
Fix AMD Pistachio implicit declarations in the same way as with AMD
DBM690T. Remove trailing whitespace. Signed-off-by: Zheng Bao <Zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/amd/dbm690t/mainboard.c10
-rw-r--r--src/mainboard/amd/pistachio/fadt.c3
-rw-r--r--src/mainboard/amd/pistachio/mainboard.c13
3 files changed, 12 insertions, 14 deletions
diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c
index 903e3a7c75..b6493205bf 100644
--- a/src/mainboard/amd/dbm690t/mainboard.c
+++ b/src/mainboard/amd/dbm690t/mainboard.c
@@ -35,7 +35,7 @@
extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
u8 val);
-extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
+extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
uint64_t start, uint64_t size);
#define ADT7461_read_byte(address) \
do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
@@ -246,16 +246,16 @@ void dbm690t_enable(device_t dev)
get_ide_dma66();
set_thermal_config();
}
-
+
int add_mainboard_resources(struct lb_memory *mem)
{
/* UMA is removed from system memory in the northbridge code, but
* in some circumstances we want the memory mentioned as reserved.
*/
-#if (CONFIG_GFXUMA == 1)
- printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
+#if (CONFIG_GFXUMA == 1)
+ printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
uma_memory_start, uma_memory_size);
- lb_add_memory_range(mem, LB_MEM_RESERVED,
+ lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_start, uma_memory_size);
#endif
}
diff --git a/src/mainboard/amd/pistachio/fadt.c b/src/mainboard/amd/pistachio/fadt.c
index d03ea5c796..e7bc017bbd 100644
--- a/src/mainboard/amd/pistachio/fadt.c
+++ b/src/mainboard/amd/pistachio/fadt.c
@@ -25,8 +25,9 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/device.h>
+#include <../southbridge/amd/sb600/sb600.h>
-extern void pm_iowrite(u8 reg, u8 value);
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
/* pm_base should be got from bar2 of rs690. Here I compact ACPI
diff --git a/src/mainboard/amd/pistachio/mainboard.c b/src/mainboard/amd/pistachio/mainboard.c
index 82ee4c0b97..39f7a333fd 100644
--- a/src/mainboard/amd/pistachio/mainboard.c
+++ b/src/mainboard/amd/pistachio/mainboard.c
@@ -25,19 +25,16 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
+#include <../southbridge/amd/sb600/sb600.h>
#include "chip.h"
#define ADT7475_ADDRESS 0x2E
#define SMBUS_IO_BASE 0x1000
-extern u8 pm_ioread(u8 reg);
-extern void pm_iowrite(u8 reg, u8 value);
-extern u8 pm2_ioread(u8 reg);
-extern void pm2_iowrite(u8 reg, u8 value);
extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
u8 val);
-extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
+extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
uint64_t start, uint64_t size);
#define ADT7475_read_byte(address) \
@@ -332,10 +329,10 @@ int add_mainboard_resources(struct lb_memory *mem)
/* UMA is removed from system memory in the northbridge code, but
* in some circumstances we want the memory mentioned as reserved.
*/
-#if (CONFIG_GFXUMA == 1)
- printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
+#if (CONFIG_GFXUMA == 1)
+ printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
uma_memory_start, uma_memory_size);
- lb_add_memory_range(mem, LB_MEM_RESERVED,
+ lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_start, uma_memory_size);
#endif
}