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authorGreg Watson <jarrah@users.sourceforge.net>2004-11-24 21:12:20 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2004-11-24 21:12:20 +0000
commit0bac237334eda124c82af0fbfa60673fb23fbaf4 (patch)
tree600e3a91d0c3afac20238cd89e0aeb57f26f6548
parentf4392503553cf31089ad91dc3e1b7546b8936999 (diff)
downloadcoreboot-0bac237334eda124c82af0fbfa60673fb23fbaf4.tar.xz
added comments
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/northbridge/motorola/mpc107/mpc107_northbridge.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/northbridge/motorola/mpc107/mpc107_northbridge.c b/src/northbridge/motorola/mpc107/mpc107_northbridge.c
index fec70b0f8c..9e64213478 100644
--- a/src/northbridge/motorola/mpc107/mpc107_northbridge.c
+++ b/src/northbridge/motorola/mpc107/mpc107_northbridge.c
@@ -9,6 +9,13 @@
#include <cpu/cpu.h>
#include "chip.h"
+/*
+ * pci_domain_read_resources needs to create two resource regions,
+ * one for memory and one for I/O. These are required for the
+ * resource allocation code to function correctly. The regions should
+ * be large enough to hold all expected resources for all PCI
+ * devices.
+ */
static void pci_domain_read_resources(device_t dev)
{
struct resource *resource;
@@ -26,6 +33,11 @@ static void pci_domain_read_resources(device_t dev)
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
}
+/*
+ * pci_domain_set_resources creates memory resources describing the
+ * fixed memory on the system. This is not actually used anywhere
+ * except when the linuxbios table is generated.
+ */
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -52,7 +64,8 @@ static void pci_domain_set_resources(device_t dev)
bank_enable = pci_read_config32(mc_dev, 0xa0);
/* Report the memory regions */
- idx = 10;
+ idx = 10; /* Why does idx start at 10? */
+
for(i = 0; i < 8; i++) {
struct resource *res;
/* Ignore banks that are not enabled */