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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-21 16:21:47 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-22 18:38:20 +0000 |
| commit | 0bca050f2cbff36f9d7c55eddafc34e6b495a767 (patch) | |
| tree | 4bbf14845da4dd910b4b5ff9e01e15f32bb3a1ab | |
| parent | 382e2167ccf29622fde208e3443e244ddec42ea6 (diff) | |
| download | coreboot-0bca050f2cbff36f9d7c55eddafc34e6b495a767.tar.xz | |
device/cardbus: Fix use of PCI_CB_BRIDGE_CONTROL
Read-modify-write needs to access the same register. Numerically
both used defines are 0x3e, while register implementations are
not identical but only similar.
Change-Id: I9348b855320f86868e2d3ef76d3b8d7a4ab7fae0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner
| -rw-r--r-- | src/device/cardbus_device.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c index 4b24c54df7..826d785fd4 100644 --- a/src/device/cardbus_device.c +++ b/src/device/cardbus_device.c @@ -161,7 +161,7 @@ void cardbus_enable_resources(struct device *dev) /* Error check */ ctrl |= (PCI_CB_BRIDGE_CTL_PARITY | PCI_CB_BRIDGE_CTL_SERR); printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); - pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); + pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctrl); pci_dev_enable_resources(dev); } |