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authorStefan Reinauer <stepan@coresystems.de>2010-05-19 18:39:23 +0000
committerStefan Reinauer <stepan@openbios.org>2010-05-19 18:39:23 +0000
commit1c3c0faabc220ef4fc921d9d1dbddb125198abab (patch)
tree4e961475dcdf7babc033c4b05b630d3d6f7563e6
parentace2dc3ac117ea1a353fc1fb9922c88cb91b0d0c (diff)
downloadcoreboot-1c3c0faabc220ef4fc921d9d1dbddb125198abab.tar.xz
cosmetic comment changes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/include/cpu/x86/cache.h17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h
index ae61b55b3d..65979fff77 100644
--- a/src/include/cpu/x86/cache.h
+++ b/src/include/cpu/x86/cache.h
@@ -20,18 +20,17 @@
#ifndef CPU_X86_CACHE
#define CPU_X86_CACHE
-/* the memory clobber prevents the GCC from reordering the read/write order
- of CR0 */
-
-#if defined(__GNUC__)
-
/*
-Need this because ROMCC fails here with:
+ * Need two versions because ROMCC chokes on certain clobbers:
+ * cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33:
+ * 0x1559920 asm Internal compiler error: lhs 1 regcm == 0
+ */
-cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33:
-0x1559920 asm Internal compiler error: lhs 1 regcm == 0
-*/
+#if defined(__GNUC__)
+/* The memory clobber prevents the GCC from reordering the read/write order
+ * of CR0
+ */
static inline unsigned long read_cr0(void)
{
unsigned long cr0;