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authorTim Wawrzynczak <twawrzynczak@chromium.org>2019-07-09 13:39:44 -0600
committerMartin Roth <martinroth@google.com>2019-07-11 15:01:24 +0000
commit20cfc87ca07ce1ac07c47480e1a6a5bc0a1e1090 (patch)
tree35ef6620911b058fa57a5313d43b1842c00b5217
parent565b0aada93a0ef40b022b9b78b1bcefdf5193bb (diff)
downloadcoreboot-20cfc87ca07ce1ac07c47480e1a6a5bc0a1e1090.tar.xz
soc/intel/cannonlake: Make EC S0ix notification optional in LPIT
Only call the \_SB.PCI0.LPCB.EC0.S0IX method if it exists. Change-Id: Idf465f8ad7cb016f3ad3d9710b46e35f66f8939b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34178 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
-rw-r--r--src/soc/intel/cannonlake/acpi/lpit.asl25
1 files changed, 17 insertions, 8 deletions
diff --git a/src/soc/intel/cannonlake/acpi/lpit.asl b/src/soc/intel/cannonlake/acpi/lpit.asl
index 93bce2644e..74d4fe6396 100644
--- a/src/soc/intel/cannonlake/acpi/lpit.asl
+++ b/src/soc/intel/cannonlake/acpi/lpit.asl
@@ -15,6 +15,7 @@
*/
External(\_SB.MS0X, MethodObj)
+External(\_SB.PCI0.LPCB.EC0.S0IX, MethodObj)
scope(\_SB)
{
@@ -34,7 +35,7 @@ scope(\_SB)
)
}
/*
- * Function 1.
+ * Function 1 - Get Device Constraints
*/
If(Arg2 == 1) {
Return(Package(5) {
@@ -42,7 +43,7 @@ scope(\_SB)
)
}
/*
- * Function 2.
+ * Function 2 - Get Crash Dump Device
*/
If(Arg2 == 2) {
Return(Buffer(One) {
@@ -50,30 +51,38 @@ scope(\_SB)
)
}
/*
- * Function 3.
+ * Function 3 - Display Off Notification
*/
If(Arg2 == 3) {
}
/*
- * Function 4.
+ * Function 4 - Display On Notification
*/
If(Arg2 == 4) {
}
/*
- * Function 5.
+ * Function 5 - Low Power S0 Entry Notification
*/
If(Arg2 == 5) {
- \_SB.PCI0.LPCB.EC0.S0IX(1)
+ /* Inform the EC */
+ If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
+ \_SB.PCI0.LPCB.EC0.S0IX(1)
+ }
+
/* provide board level s0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(1)
}
}
/*
- * Function 6.
+ * Function 6 - Low Power S0 Exit Notification
*/
If(Arg2 == 6) {
- \_SB.PCI0.LPCB.EC0.S0IX(0)
+ /* Inform the EC */
+ If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
+ \_SB.PCI0.LPCB.EC0.S0IX(0)
+ }
+
/* provide board level s0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(0)