summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2013-03-06 15:56:14 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-07 01:43:24 +0100
commit2323f3551fe630e33f7ef59f1309db56956af5d4 (patch)
tree9e1ad48d88bf564d964b41bf8242d94d9903becb
parent0f4c0e2669f76bf1081bf13019bc664b4f0e6b38 (diff)
downloadcoreboot-2323f3551fe630e33f7ef59f1309db56956af5d4.tar.xz
google/snow: fix coding style
cosmetics Change-Id: Iea33768d901641861aa7b2c76af8753a848f584d Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2601 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
-rw-r--r--src/mainboard/google/snow/romstage.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 8de4381d03..83d5105852 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -51,7 +51,8 @@ static int board_wakeup_permitted(void)
}
#endif
-static void initialize_s5p_mshc(void) {
+static void initialize_s5p_mshc(void)
+{
/* MMC0: Fixed, 8 bit mode, connected with GPIO. */
if (clock_set_mshci(PERIPH_ID_SDMMC0))
printk(BIOS_CRIT, "Failed to set clock for SDMMC0.\n");
@@ -69,9 +70,9 @@ static void initialize_s5p_mshc(void) {
static void graphics(void)
{
-
exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
}
+
void main(void)
{
struct mem_timings *mem;