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| author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-09-02 15:44:23 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:32:37 +0000 |
| commit | 2afb5cf8b164e853c0ba8d72e459407ea9b80326 (patch) | |
| tree | 49949ab37eb065a785b3c2b894c99eb56a1bc8af | |
| parent | 4d761db7e8aeeef139e8b1c306bd481c09be2685 (diff) | |
| download | coreboot-2afb5cf8b164e853c0ba8d72e459407ea9b80326.tar.xz | |
vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3
PSTACK2 (IOU3) should be stack number 4, mainboard uses stack number as
the index to access the bus number array read by get_stack_busnos().
Without the fix it would get the wrong bus number (0xb1).
Tested=On OCP Delta Lake, dmidecode -t 9 to verify slots bus number on
IOU3 are correct (0xb2).
Change-Id: I1c9e49bbc9a00de82d1fc67b3b4ed47e03eacdda
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h index 79c41621c8..0f5b33fe52 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h @@ -111,13 +111,20 @@ typedef enum { } PCIE_PORTS; /** - IIO Stacks - **/ + * IIO Stacks + * + * Ports Stack Stack(HOB) IioConfigIou + * ================================================= + * 0 CSTACK stack 0 IOU0 + * 1A..1D PSTACK0 stack 1 IOU1 + * 2A..2D PSTACK1 stack 2 IOU2 + * 3A..3D PSTACK2 stack 4 IOU3 + */ typedef enum { CSTACK = 0, PSTACK0, PSTACK1, - PSTACK2, + PSTACK2 = 4, MAX_STACKS } IIO_STACKS; |