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authorRonald G. Minnich <rminnich@gmail.com>2006-09-18 22:50:51 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-09-18 22:50:51 +0000
commit2cf779d8d17ce2737ee1b49f6faecb7e76ac6b92 (patch)
tree892c12a83d802ea9d05ff38e70aee43125a64619
parent0740c31cff42e97ab16353d38a58b4bffdbb124d (diff)
downloadcoreboot-2cf779d8d17ce2737ee1b49f6faecb7e76ac6b92.tar.xz
fix old bug in the src/devices/pci_device.c
add devices for the lx and artecgroup/dbe61 point artecgroup at cs5536_lx as it is so different. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/devices/pci_device.c12
-rw-r--r--src/include/device/pci_ids.h3
-rw-r--r--src/mainboard/artecgroup/dbe61/Config.lb2
3 files changed, 10 insertions, 7 deletions
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index 9451ea35aa..2a7502b280 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -761,7 +761,9 @@ static void set_pci_ops(struct device *dev)
return;
}
- /* Look through the list of setup drivers and find one for
+ printk_debug("%s: seeking driver for %x:%x class %x\n",
+ __FUNCTION__, dev->vendor, dev->device, dev->class);
+ /* Look through the list of setup drivers and find one for
* this pci device
*/
for(driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) {
@@ -1176,13 +1178,13 @@ void pci_level_irq(unsigned char intNum)
/* this seems like an error but is not ... */
#if 1
- if (inb(0x4d0) != (intBits & 0xf)) {
+ if (inb(0x4d0) != (intBits & 0xff)) {
printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
- __func__, intBits &0xf, inb(0x4d0));
+ __func__, intBits &0xff, inb(0x4d0));
}
- if (inb(0x4d1) != ((intBits >> 8) & 0xf)) {
+ if (inb(0x4d1) != ((intBits >> 8) & 0xff)) {
printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
- __func__, (intBits>>8) &0xf, inb(0x4d1));
+ __func__, (intBits>>8) &0xff, inb(0x4d1));
}
#endif
}
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index f396184032..34721879fd 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -400,6 +400,7 @@
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
#define PCI_DEVICE_ID_AMD_LX 0x1054
+#define PCI_DEVICE_ID_AMD_LXBRIDGE 0x2080
#define PCI_DEVICE_ID_AMD_SCSI 0x2020
#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
@@ -448,7 +449,7 @@
#define PCI_DEVICE_ID_AMD_8132_PCIX 0x7458
#define PCI_DEVICE_ID_AMD_8132_IOAPIC 0x7459
-
+#define PCI_DEVICE_ID_AMD_AES 0x2082
#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090
#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091
#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x2092
diff --git a/src/mainboard/artecgroup/dbe61/Config.lb b/src/mainboard/artecgroup/dbe61/Config.lb
index 085685279b..b9d0e15f39 100644
--- a/src/mainboard/artecgroup/dbe61/Config.lb
+++ b/src/mainboard/artecgroup/dbe61/Config.lb
@@ -134,7 +134,7 @@ chip northbridge/amd/lx
device pci_domain 0 on
device pci 1.0 on end
device pci 1.1 on end
- chip southbridge/amd/cs5536
+ chip southbridge/amd/cs5536_lx
register "enable_gpio0_inta" = "1"
register "enable_ide_nand_flash" = "1"
register "enable_uarta" = "1"