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authorSubrata Banik <subrata.banik@intel.com>2020-01-16 10:13:28 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-01-16 16:28:09 +0000
commit2fff39151334bc5fbdc51d92a49b3f6a0d7766db (patch)
treebc602587c91215191d8e2b0dcf7cba25df7ee5de
parent937931ea04c27986312d261f0fbd2eff797615c7 (diff)
downloadcoreboot-2fff39151334bc5fbdc51d92a49b3f6a0d7766db.tar.xz
soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC specific Kconfig
This patch moves common pch code SOC_INTEL_COMMON_BLOCK_THERMAL Kconfig selection into SoC specific Kconfig selection as PCH thermal device is not available with latest PCH (i.e. TGP and JSP). Also added TODO for TGL thermal configuration as applicable. TEST=Able to build and boot TGL RVP with this CL Change-Id: Ibce17cc9f38fb666011ccd8f97bee63033ff5302 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38444 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/common/pch/Kconfig1
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig1
-rw-r--r--src/soc/intel/tigerlake/finalize.c9
5 files changed, 4 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 26bae068df..d098785bad 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -97,6 +97,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig
index 7f662fc38c..1e8cdcdc23 100644
--- a/src/soc/intel/common/pch/Kconfig
+++ b/src/soc/intel/common/pch/Kconfig
@@ -38,7 +38,6 @@ config PCH_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_TCO
select SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS
- select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XDCI
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 7f1cd893a3..15e895fa1d 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9674024073..6277cea0b8 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -66,6 +66,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
select SOC_INTEL_COMMON_PCH_BASE
diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c
index 2de58a9e70..aed5cc0e5e 100644
--- a/src/soc/intel/tigerlake/finalize.c
+++ b/src/soc/intel/tigerlake/finalize.c
@@ -68,14 +68,7 @@ static void pch_finalize(void)
/* TCO Lock down */
tco_lockdown();
- /*
- * Set low maximum temp threshold value used for dynamic thermal sensor
- * shutdown consideration.
- *
- * If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the
- * thermal sensor when CPU is in a C-state and DTS Temp <= LTT.
- */
- pch_thermal_configuration();
+ /* TODO: Add Thermal Configuration */
/*
* Disable ACPI PM timer based on dt policy