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authorMatt DeVillier <matt.devillier@gmail.com>2018-08-01 13:05:14 -0500
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-08-01 22:23:54 +0000
commit3044af7adc652f41670f8de0c3c54bc09f632079 (patch)
treef1b936af303292c7e3ed35a188809fbc3f9a249a
parent9fe248fbeca2c62153dc4d8d89bfc9cd1d84dcd3 (diff)
downloadcoreboot-3044af7adc652f41670f8de0c3c54bc09f632079.tar.xz
mb/google,samsung/*: Add LPC TPM chip driver to devicetree
With commits 9987534 [southbridge/intel: Remove leftover TPM ACPI code] and 66ce18c [soc/intel: Remove legacy static TPM asl code] removing TPM ASL code from the southbridge's LPCB device, the LPC TPM chip driver (drivers/pc80/tpm) must be added to devicetree in order to ensure the new acpigen code is used to replace it. Test: boot various google/samsung boards, verify SSDT created with LPBC.TPM device and TPM visible to and usable by SeaBIOS and Linux Change-Id: Iedaa01f26fb357914549bb3dda24b0bd6ef67480 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27786 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/beltino/devicetree.cb3
-rw-r--r--src/mainboard/google/butterfly/devicetree.cb3
-rw-r--r--src/mainboard/google/jecht/devicetree.cb3
-rw-r--r--src/mainboard/google/link/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/banjo/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/candy/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/clapper/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/enguarde/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/glimmer/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/gnawty/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/heli/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/kip/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/ninja/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/orco/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/quawks/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/rambi/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/squawks/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/sumo/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/swanky/devicetree.cb3
-rw-r--r--src/mainboard/google/rambi/variants/winky/devicetree.cb3
-rw-r--r--src/mainboard/google/slippy/variants/falco/devicetree.cb3
-rw-r--r--src/mainboard/google/slippy/variants/leon/devicetree.cb3
-rw-r--r--src/mainboard/google/slippy/variants/peppy/devicetree.cb3
-rw-r--r--src/mainboard/google/slippy/variants/wolf/devicetree.cb3
-rw-r--r--src/mainboard/google/stout/devicetree.cb3
-rw-r--r--src/mainboard/samsung/lumpy/devicetree.cb3
-rw-r--r--src/mainboard/samsung/stumpy/devicetree.cb3
27 files changed, 81 insertions, 0 deletions
diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index 90409cd99c..89758dd1f5 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -96,6 +96,9 @@ chip northbridge/intel/haswell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip superio/ite/it8772f
# Skip keyboard init
register "skip_keyboard" = "1"
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index 9b44fe8a19..692414cd65 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -87,6 +87,9 @@ chip northbridge/intel/sandybridge
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on #LPC bridge
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/quanta/ene_kb3940q
# 60/64 KBC
device pnp ff.1 on # dummy address
diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index 8a2129f4eb..d34bf7a5d5 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -76,6 +76,9 @@ chip soc/intel/broadwell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip superio/ite/it8772f
# Skip keyboard init
register "skip_keyboard" = "1"
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 437b3cbfc8..07be8e7c26 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -86,6 +86,9 @@ chip northbridge/intel/sandybridge
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/banjo/devicetree.cb b/src/mainboard/google/rambi/variants/banjo/devicetree.cb
index e380920e0e..acfb2719b4 100644
--- a/src/mainboard/google/rambi/variants/banjo/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/banjo/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/candy/devicetree.cb b/src/mainboard/google/rambi/variants/candy/devicetree.cb
index 5cbb974cb2..e4a39e9276 100644
--- a/src/mainboard/google/rambi/variants/candy/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/candy/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/clapper/devicetree.cb b/src/mainboard/google/rambi/variants/clapper/devicetree.cb
index 13902b009b..497a0b1dea 100644
--- a/src/mainboard/google/rambi/variants/clapper/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/clapper/devicetree.cb
@@ -76,6 +76,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/enguarde/devicetree.cb b/src/mainboard/google/rambi/variants/enguarde/devicetree.cb
index 89929b0c6a..3b00bb789e 100644
--- a/src/mainboard/google/rambi/variants/enguarde/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/enguarde/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/glimmer/devicetree.cb b/src/mainboard/google/rambi/variants/glimmer/devicetree.cb
index 5148225472..db26366b3a 100644
--- a/src/mainboard/google/rambi/variants/glimmer/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/glimmer/devicetree.cb
@@ -85,6 +85,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/gnawty/devicetree.cb b/src/mainboard/google/rambi/variants/gnawty/devicetree.cb
index 0024679eff..30320ccd1f 100644
--- a/src/mainboard/google/rambi/variants/gnawty/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/gnawty/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/heli/devicetree.cb b/src/mainboard/google/rambi/variants/heli/devicetree.cb
index 8b3c83f588..c3ec601a6c 100644
--- a/src/mainboard/google/rambi/variants/heli/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/heli/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/kip/devicetree.cb b/src/mainboard/google/rambi/variants/kip/devicetree.cb
index d1d6beb155..5bb99f0483 100644
--- a/src/mainboard/google/rambi/variants/kip/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/kip/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/ninja/devicetree.cb b/src/mainboard/google/rambi/variants/ninja/devicetree.cb
index 5c9595c49c..c983681378 100644
--- a/src/mainboard/google/rambi/variants/ninja/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/ninja/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/orco/devicetree.cb b/src/mainboard/google/rambi/variants/orco/devicetree.cb
index 829179462f..63b60979fe 100644
--- a/src/mainboard/google/rambi/variants/orco/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/orco/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/quawks/devicetree.cb b/src/mainboard/google/rambi/variants/quawks/devicetree.cb
index 320b59bfe4..0e1f7895f1 100644
--- a/src/mainboard/google/rambi/variants/quawks/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/quawks/devicetree.cb
@@ -85,6 +85,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/rambi/devicetree.cb b/src/mainboard/google/rambi/variants/rambi/devicetree.cb
index ddd1914d9e..a24bd33611 100644
--- a/src/mainboard/google/rambi/variants/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/rambi/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/squawks/devicetree.cb b/src/mainboard/google/rambi/variants/squawks/devicetree.cb
index 46f2385082..ae4bfe5103 100644
--- a/src/mainboard/google/rambi/variants/squawks/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/squawks/devicetree.cb
@@ -85,6 +85,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/sumo/devicetree.cb b/src/mainboard/google/rambi/variants/sumo/devicetree.cb
index 89e2f2b073..f354815077 100644
--- a/src/mainboard/google/rambi/variants/sumo/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/sumo/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/swanky/devicetree.cb b/src/mainboard/google/rambi/variants/swanky/devicetree.cb
index db21bd66b1..d591e3fb6a 100644
--- a/src/mainboard/google/rambi/variants/swanky/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/swanky/devicetree.cb
@@ -88,6 +88,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/rambi/variants/winky/devicetree.cb b/src/mainboard/google/rambi/variants/winky/devicetree.cb
index 6d52b89e48..9c25d1eb67 100644
--- a/src/mainboard/google/rambi/variants/winky/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/winky/devicetree.cb
@@ -89,6 +89,9 @@ chip soc/intel/baytrail
device pci 1e.4 off end # HSUART2
device pci 1e.5 off end # SPI
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/slippy/variants/falco/devicetree.cb b/src/mainboard/google/slippy/variants/falco/devicetree.cb
index cdf47cf5aa..f2a952070e 100644
--- a/src/mainboard/google/slippy/variants/falco/devicetree.cb
+++ b/src/mainboard/google/slippy/variants/falco/devicetree.cb
@@ -109,6 +109,9 @@ chip northbridge/intel/haswell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/slippy/variants/leon/devicetree.cb b/src/mainboard/google/slippy/variants/leon/devicetree.cb
index b0edb7fa2d..8951e99e39 100644
--- a/src/mainboard/google/slippy/variants/leon/devicetree.cb
+++ b/src/mainboard/google/slippy/variants/leon/devicetree.cb
@@ -114,6 +114,9 @@ chip northbridge/intel/haswell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/slippy/variants/peppy/devicetree.cb b/src/mainboard/google/slippy/variants/peppy/devicetree.cb
index e9875a66e7..6451d95856 100644
--- a/src/mainboard/google/slippy/variants/peppy/devicetree.cb
+++ b/src/mainboard/google/slippy/variants/peppy/devicetree.cb
@@ -113,6 +113,9 @@ chip northbridge/intel/haswell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/slippy/variants/wolf/devicetree.cb b/src/mainboard/google/slippy/variants/wolf/devicetree.cb
index 7655c412a9..2cad23b75c 100644
--- a/src/mainboard/google/slippy/variants/wolf/devicetree.cb
+++ b/src/mainboard/google/slippy/variants/wolf/devicetree.cb
@@ -114,6 +114,9 @@ chip northbridge/intel/haswell
device pci 1d.0 on end # USB2 EHCI
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/google/chromeec
# We only have one init function that
# we need to call to initialize the
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 76f285669a..0fdb55ebdb 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -97,6 +97,9 @@ chip northbridge/intel/sandybridge
device pci 1d.0 on end # USB2 EHCI #1 (Camera, WLAN, WWAN)
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
chip ec/quanta/it8518
# 60h/64h KBC
device pnp ff.1 on # dummy address
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 0dd32280cd..0362b2c6cd 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -119,6 +119,9 @@ chip northbridge/intel/sandybridge
register "base" = "(void *)0xfec00000"
device ioapic 4 on end
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
end
device pci 1f.2 on # SATA Controller 1
ioapic_irq 4 INTA 0x10
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index adc15e668e..825dfa0d2c 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -116,6 +116,9 @@ chip northbridge/intel/sandybridge
end # Mouse
device pnp 2e.a off end # IR
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus