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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-26 21:57:43 +0100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-27 04:05:43 +0100 |
| commit | 3572f5c6f0876f055bb4d4567a9ba89a0fd05976 (patch) | |
| tree | f4be2b886eb0a8a712e1b3acdfdddef74861b5bb | |
| parent | 5b5f834e8475fc89af85d2d706b8c31f32e6f4f3 (diff) | |
| download | coreboot-3572f5c6f0876f055bb4d4567a9ba89a0fd05976.tar.xz | |
sitemp-g1p1: Migrate to new cmos.default approach
Current code just prints warning, defaults match the behaviour of
current code when checksum is incorrect and look sane.
Change-Id: Icda0d3cb3517fc15e6a0ee787b00276d2d435776
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4827
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/cmos.default | 23 | ||||
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/cmos.layout | 10 | ||||
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/romstage.c | 5 |
4 files changed, 27 insertions, 12 deletions
diff --git a/src/mainboard/siemens/sitemp_g1p1/Kconfig b/src/mainboard/siemens/sitemp_g1p1/Kconfig index c93012150a..8d0ff80455 100644 --- a/src/mainboard/siemens/sitemp_g1p1/Kconfig +++ b/src/mainboard/siemens/sitemp_g1p1/Kconfig @@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_MP_TABLE select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE + select HAVE_CMOS_DEFAULT select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 select QRANK_DIMM_SUPPORT diff --git a/src/mainboard/siemens/sitemp_g1p1/cmos.default b/src/mainboard/siemens/sitemp_g1p1/cmos.default new file mode 100644 index 0000000000..c330585c70 --- /dev/null +++ b/src/mainboard/siemens/sitemp_g1p1/cmos.default @@ -0,0 +1,23 @@ +last_boot=Fallback +baud_rate=115200 +debug_level=Spew +power_on_after_fail=Enable +nmi=Enable +sata_mode=AHCI +boot_devices='' +multi_core=Enable +cpu_fan_control=Disable +chassis_fan_control=Disable +cpu_fan_polarity=Active_high +chassis_fan_polarity=Active_high +cpu_t_min=45 +cpu_t_max=65 +cpu_dutycycle_min=30% +cpu_dutycycle_max=90% +chassis_t_min=40 +chassis_t_max=70 +chassis_dutycycle_min=25% +chassis_dutycycle_max=90% +lcd_panel_id=no_panel +boot_delay=off +boot_default=0 diff --git a/src/mainboard/siemens/sitemp_g1p1/cmos.layout b/src/mainboard/siemens/sitemp_g1p1/cmos.layout index 52a8b4f627..d03a191059 100644 --- a/src/mainboard/siemens/sitemp_g1p1/cmos.layout +++ b/src/mainboard/siemens/sitemp_g1p1/cmos.layout @@ -51,10 +51,9 @@ entries #96 288 r 0 temporary_filler 0 384 r 0 reserved_memory # ======================================================== -#384 1 e 4 unused -385 1 r 4 last_boot -#386 1 r 1 unused -387 1 e 16 cmos_defaults_loaded +#384 1 r 0 unused +385 1 e 4 last_boot +#386 2 r 1 unused 388 4 r 0 reboot_bits 392 3 e 5 baud_rate #395 1 r 1 unused @@ -193,9 +192,6 @@ enumerations 15 13 90% 15 14 95% 15 15 100% -# cmos_defaults_loaded -16 0 No -16 1 Yes # sata_mode 17 0 AHCI 17 1 IDE diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index cdab764a55..6d3652431b 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -195,11 +195,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs690_before_pci_init(); // does nothing sb600_before_pci_init(); -#if CONFIG_USE_OPTION_TABLE - if( read_option(cmos_defaults_loaded, 0) ) - __WARNING__("WARNING: CMOS DEFAULTS LOADED. PLEASE CHECK CMOS OPTION \"cmos_default_loaded\" !\n"); -#endif - post_cache_as_ram(); } |