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authorMyles Watson <mylesgw@gmail.com>2008-12-18 18:24:11 +0000
committerMyles Watson <mylesgw@gmail.com>2008-12-18 18:24:11 +0000
commit43bb9cddddf90b996e6862d261024c9149fdd59c (patch)
treecbb912ec586e4e7adf2e4795feed57b984fd6fe8
parent845a2eba1647b7a88546bda1ad2a587e5312fd77 (diff)
downloadcoreboot-43bb9cddddf90b996e6862d261024c9149fdd59c.tar.xz
This patch gets rid of all the implicit definition warnings for serengeti except get_nodes.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/arch/i386/include/arch/acpi.h2
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c2
-rw-r--r--src/include/device/pci.h4
-rw-r--r--src/northbridge/amd/amdk8/amdk8_f.h2
-rw-r--r--src/southbridge/amd/amd8111/amd8111.c2
-rw-r--r--src/southbridge/amd/amd8111/amd8111_nic.c1
6 files changed, 12 insertions, 1 deletions
diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/i386/include/arch/acpi.h
index 66b6f64074..0e628b4cb3 100644
--- a/src/arch/i386/include/arch/acpi.h
+++ b/src/arch/i386/include/arch/acpi.h
@@ -317,6 +317,8 @@ int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base, u16 seg_
unsigned long acpi_create_srat_lapics(unsigned long current);
void acpi_create_srat(acpi_srat_t *srat);
+void acpi_create_slit(acpi_slit_t *slit);
+
void acpi_create_hpet(acpi_hpet_t *hpet);
void acpi_create_mcfg(acpi_mcfg_t *mcfg);
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 033f789442..0fd31d0382 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -435,6 +435,8 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
#if WAIT_BEFORE_CPUS_INIT==0
#define cpus_ready_for_init() do {} while(0)
+#else
+ void cpus_ready_for_init(void);
#endif
#if HAVE_SMI_HANDLER
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index decc20d29b..ad005cfe89 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -72,6 +72,10 @@ unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last);
unsigned pci_find_capability(device_t dev, unsigned cap);
struct resource *pci_get_resource(struct device *dev, unsigned long index);
void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device);
+void pci_dev_init(struct device *dev);
+void pci_level_irq(unsigned char intNum);
+void pci_assign_irqs(unsigned bus, unsigned slot,
+ const unsigned char pIntAtoD[4]);
#define PCI_IO_BRIDGE_ALIGN 4096
#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
diff --git a/src/northbridge/amd/amdk8/amdk8_f.h b/src/northbridge/amd/amdk8/amdk8_f.h
index 1b9c7763a9..733041513e 100644
--- a/src/northbridge/amd/amdk8/amdk8_f.h
+++ b/src/northbridge/amd/amdk8/amdk8_f.h
@@ -521,6 +521,8 @@ struct sys_info {
#ifdef __ROMCC__
static void soft_reset(void);
+#else
+void hard_reset(void);
#endif
static void wait_all_core0_mem_trained(struct sys_info *sysinfo)
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index f1a1862edb..d5536c4fc1 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -11,7 +11,7 @@ void amd8111_enable(device_t dev)
unsigned index;
unsigned reg_old, reg;
- /* See if we are on the behind the amd8111 pci bridge */
+ /* See if we are on the bus behind the amd8111 pci bridge */
bus_dev = dev->bus->dev;
if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
(bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI))
diff --git a/src/southbridge/amd/amd8111/amd8111_nic.c b/src/southbridge/amd/amd8111/amd8111_nic.c
index 241cc01622..d326d83dda 100644
--- a/src/southbridge/amd/amd8111/amd8111_nic.c
+++ b/src/southbridge/amd/amd8111/amd8111_nic.c
@@ -7,6 +7,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <arch/io.h>
+#include <delay.h>
#include "amd8111.h"